EP2S30F672C3N Altera, EP2S30F672C3N Datasheet - Page 185

• Manufacturer Part Number: EP2S30F672C3N
• Description: IC STRATIX II FPGA 30K 672-FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S30F672C3N

• Number Of Logic Elements/cells: 33880
• Number Of Labs/clbs: 1694
• Total Ram Bits: 1369728
• Number Of I /o: 500
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• No. Of Macrocells: 33880
• Family Type: Stratix II
• No. Of I/o's: 500
• Clock Management: DLL, PLL
• I/o Supply Voltage: 3.6V
• Operating Frequency Max: 550MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1896; EP2S30F672C3N

Altera Corporation
April 2011
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C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
Table 5–65. EP2S180 Column Pins Global Clock Timing Parameters
Table 5–66. EP2S180 Row Pins Regional Clock Timing Parameters
Table 5–67. EP2S180 Row Pins Global Clock Timing Parameters
Parameter
Parameter
Parameter
Industrial
Industrial
Industrial
-0.457
-0.542
-0.537
-0.542
-0.537
2.003
1.846
1.759
1.764
1.763
1.768
-0.3
Minimum Timing
Minimum Timing
Minimum Timing
Commercial
Commercial
Commercial
-0.455
-0.541
-0.536
-0.542
-0.537
2.100
1.935
1.844
1.849
1.850
1.855
-0.29
-3 Speed
-3 Speed
-3 Speed
Grade
-0.201
Grade
-0.317
-0.321
Grade
-0.319
-0.323
3.652
3.398
0.053
3.273
3.269
3.285
3.281
Stratix II Device Handbook, Volume 1
-4 Speed
-4 Speed
-4 Speed
Grade
-0.224
Grade
-0.353
-0.357
Grade
-0.355
-0.359
3.993
3.715
0.054
3.577
3.573
3.588
3.584
DC & Switching Characteristics
-5 Speed
-5 Speed
-5 Speed
Grade
-0.266
Grade
-0.414
-0.419
Grade
-0.425
4.648
4.324
0.058
4.162
4.157
4.176
4.171
-0.42
Unit
Unit
Unit
5–49
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns