EP3C120F780C8 Altera, EP3C120F780C8 Datasheet - Page 27

• Manufacturer Part Number: EP3C120F780C8
• Description: IC CYCLONE III FPGA 119K 780FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C120F780C8

• Number Of Logic Elements/cells: 119088
• Number Of Labs/clbs: 7443
• Total Ram Bits: 3981312
• Number Of I /o: 531
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2589 - KIT DEV EMB CYCLONE III EDITION544-2566 - KIT DEV DSP CYCLONE III EDITION544-2444 - KIT DEV CYCLONE III EP3C120544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Other names: 544-2391; 544-2531; 544-2531; EP3C120F780C8ES

Board Design Considerations
© November 2008 Altera Corporation
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Configuration Devices
The EPCS devices (EPCS4, EPCS16, EPCS64, and EPCS128) are used in the AS
configuration scheme for Cyclone III devices.
For information about the EPCS devices, refer to the
(EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet
Configuration Handbook.
EPCS Connection
The four-pin interface of the EPCS device consists of a serial clock input (DCLK), serial
data output (DATA), AS data input (ASDI), and an active-low chip select (nCS). This
four-pin interface connects to the Cyclone III device pins, which are the DCLK,
DATA[0], DATA[1], and FLASH_nCE, respectively. The Cyclone III device’s
FLASH_nCE pin functions as the nCEO pin in AS configuration scheme, and DATA[1]
pin functions as the ASDO pin in AS configuration scheme.
When connecting a serial configuration device to the Cyclone III device in single
device AS configuration, you must connect a 25-
serial configuration device for the DATA[0]. In single device AS configuration, the
board trace length between the serial configuration device to the Cyclone III device
should not exceed 10 inches.
For more information on the connections for AS configuration scheme, refer to the
Configuring Cyclone III Devices
EPCS Support for Cyclone III Devices
In Cyclone III devices, the active master clock frequency runs at a maximum of 40
MHz, and at a typical 30 MHz. Cyclone III devices work only with EPCS devices that
support up to 40 MHz. Existing batches of EPCS4 manufactured on 0.15 µm process
geometry support AS configuration in Cyclone III devices up to 40 MHz. However,
batches of EPCS4 manufactured on 0.18 µm process geometry support only up to 20
MHz and do not support AS configuration in Cyclone III devices. The EPCS16 and
EPCS64 serial configuration devices are not affected.
For information about product traceability and transition date to differentiate
between 0.15 µm process geometry and 0.18 µm process geometry EPCS4 serial
configuration devices, refer to the PCN 0514 Manufacturing Changes on EPCS Family
process change notification on the Altera website at www.altera.com.
1
If you use the AS configuration scheme for Cyclone III devices, the V
the I/O Bank 1 must be 3.3 V. If you use the AP configuration scheme for
Cyclone III devices, the V
and must be either 1.8, 2.5, 3.0 or 3.3 V. Altera recommends not to use level
shifters between a configuration device and the Cyclone III device in any
active (AS or AP) configuration scheme.
chapter in volume 1 of the Cyclone III Device Handbook.
CCIO
of I/O Banks 1, 6, 7 and 8 must be the same
Ω
series resistor at the near end of the
Serial Configuration Devices
in volume 2 of the
CCIO
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