EP2C70F896I8N Altera, EP2C70F896I8N Datasheet - Page 19

• Manufacturer Part Number: EP2C70F896I8N
• Description: IC CYCLONE II FPGA 70K 896-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C70F896I8N

• Number Of Logic Elements/cells: 68416
• Number Of Labs/clbs: 4276
• Total Ram Bits: 1152000
• Number Of I /o: 622
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 896-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 68416
• # I/os (max): 622
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 68416
• Ram Bits: 1152000
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 896
• Package Type: FBGA
• For Use With: P0304 - DE2-70 CALL FOR ACADEMIC PRICING544-1703 - VIDEO KIT W/CYCLONE II EP2C70N544-1699 - DSP KIT W/CYCLONE II EPS2C70N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2147

Logic Array
Blocks
Figure 2–5. Cyclone II LAB Structure
Altera Corporation
February 2007
Direct link
interconnect
from adjacent
block
Direct link
interconnect
to adjacent
block
Each LAB consists of the following:
■
■
■
■
■
The local interconnect transfers signals between LEs in the same LAB.
Register chain connections transfer the output of one LE’s register to the
adjacent LE’s register within an LAB. The Quartus II Compiler places
associated logic within an LAB or adjacent LABs, allowing the use of
local, and register chain connections for performance and area efficiency.
Figure 2–5
16 LEs
LAB control signals
LE carry chains
Register chains
Local interconnect
LAB
shows the Cyclone II LAB.
Local Interconnect
Cyclone II Device Handbook, Volume 1
Row Interconnect
Cyclone II Architecture
Direct link
interconnect
from adjacent
block
Direct link
interconnect
to adjacent
block
Column
Interconnect
2–7