EP2C15AF256I8N Altera, EP2C15AF256I8N Datasheet - Page 47

• Manufacturer Part Number: EP2C15AF256I8N
• Description: IC CYCLONE II FPGA 15K 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C15AF256I8N

• Number Of Logic Elements/cells: 14448
• Number Of Labs/clbs: 903
• Total Ram Bits: 239616
• Number Of I /o: 152
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-FBGA
• No. Of Macrocells: 14448
• Family Type: Cyclone II
• No. Of I/o's: 152
• Clock Management: PLL
• I/o Supply Voltage: 3.6V
• Operating Frequency Max: 320MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1780

Altera Corporation
February 2007
There is only one signa and one signb signal for each dedicated
multiplier. Therefore, all of the data A inputs feeding the same dedicated
multiplier must have the same sign representation. Similarly, all of the
data B inputs feeding the same dedicated multiplier must have the same
sign representation. The signa and signb signals can be changed
dynamically to modify the sign representation of the input operands at
run time. The multiplier offers full precision regardless of the sign
representation and can be registered using dedicated registers located at
the input register stage.
Multiplier Modes
Table 2–12
multipliers can operate in.
18-bit Multiplier
9-bit Multiplier
Table 2–12. Embedded Multiplier Modes
Multiplier Mode
summarizes the different modes that the embedded
An embedded multiplier can be configured to support a
single 18 × 18 multiplier for operand widths up to 18 bits.
All 18-bit multiplier inputs and results can be registered
independently. The multiplier operands can accept
signed integers, unsigned integers, or a combination of
both.
An embedded multiplier can be configured to support
two 9 × 9 independent multipliers for operand widths up
to 9-bits. Both 9-bit multiplier inputs and results can be
registered independently. The multiplier operands can
accept signed integers, unsigned integers or a
combination of both.
There is only one signa signal to control the sign
representation of both data A inputs and one signb
signal to control the sign representation of both data B
inputs of the 9-bit multipliers within the same dedicated
multiplier.
Cyclone II Device Handbook, Volume 1
Description
Cyclone II Architecture
2–35