ADSP-21375KSZ-2B Analog Devices Inc, ADSP-21375KSZ-2B Datasheet - Page 41

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ADSP-21375KSZ-2B

Manufacturer Part Number
ADSP-21375KSZ-2B
Description
IC DSP 32BIT 266MHZ 208-MQFP
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Floating Pointr
Datasheet

Specifications of ADSP-21375KSZ-2B

Interface
DAI, DPI
Clock Rate
266MHz
Non-volatile Memory
ROM (256 kB)
On-chip Ram
64kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
208-MQFP, 208-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SPI Interface—Master
The ADSP-21371/ADSP-21375 contains two SPI ports. Both
primary and secondary are available through DPI only. The
timing provided in
Table 39. SPI Interface Protocol—Master Switching and Timing Specifications
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
t
t
SSPIDM
HSPIDM
SPICLKM
SPICHM
SPICLM
DDSPIDM
HDSPIDM
SDSCIM
HDSM
SPITDM
CPHASE = 1
CPHASE = 0
FLAG3
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
SPICLK
(CP = 0)
SPICLK
(CP = 1)
MOSI
(INPUT)
MOSI
(INPUT)
MISO
MISO
Table 39
-
0
Data Input Valid To SPICLK Edge (Data Input Setup Time)
SPICLK Last Sampling Edge To Data Input Not Valid
Serial Clock Cycle
Serial Clock High Period
Serial Clock Low Period
SPICLK Edge to Data Out Valid (Data Out Delay Time)
SPICLK Edge to Data Out Not Valid (Data Out Hold Time)
FLAG3–0IN (SPI device select) Low to First SPICLK Edge
Last SPICLK Edge to FLAG3–0IN High
Sequential Transfer Delay
t
SSPIDM
and
t
SDSCIM
Table 40
VALID
MSB
t
t
MSB
SPICHM
SPICL M
applies to both.
VALID
MSB
t
HSPIDM
t
t
D DSPIDM
t
SSPIDM
t
MSB
SPICLM
SPICHM
Rev. B | Page 41 of 52 | June 2008
Figure 29. SPI Master Timing
t
DDSPIDM
t
HSPIDM
t
HDSPIDM
t
t
SSPIDM
HDSPIDM
t
VALID
SPI CLKM
LSB
LSB
Min
2
8 × t
4 × t
4 × t
4 × t
4 × t
4 × t
8.2
4 × t
VALID
LSB
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
t
HDSM
– 2
ADSP-21371/ADSP-21375
– 2
– 2
– 2
– 2
– 2
– 1
LSB
t
HSPIDM
t
SPIT DM
Max
2.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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