ADSP-2185BST-115 Analog Devices Inc, ADSP-2185BST-115 Datasheet - Page 16

• Manufacturer Part Number: ADSP-2185BST-115
• Description: IC DSP CONTROLLER 16BIT 100TQFP
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2185BST-115

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Serial Port
• Clock Rate: 28.8MHz
• Non-volatile Memory: External
• On-chip Ram: 80kB
• Voltage - I/o: 5.00V
• Voltage - Core: 5.00V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP

ADSP-2185
CAPACITIVE LOADING
Figures 9 and 10 show the capacitive loading characteristics of
the ADSP-2185.
Figure 9. Typical Output Rise Time vs. Load Capacitance,
C
Figure 10. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
Temperature)
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured
output high or low voltage to a high impedance state. The out-
put disable time (t
as shown in the Output Enable/Disable diagram. The time is the
interval from when a reference signal reaches a high or low
voltage level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage. The decay time,
t
load, i
lowing equation:
from which
DECAY
L
(at Maximum Ambient Operating Temperature)
L
, is dependent on the capacitive load, C
NOMINAL
, on the output pin. It can be approximated by the fol-
30
25
20
15
10
5
0
0
18
16
14
12
10
–2
–4
–6
8
6
4
2
T = +85 C
V
0
DD
L
= 4.5V
(at Maximum Ambient Operating
50
DIS
t
DIS
) is the difference of t
t
50
DECAY
= t
100
MEASURED
100
C
C
L
150
L
– pF
C
L
i
– pF
– t
L
0.5V
DECAY
150
200
MEASURED
L
, and the current
250
200
and t
300
250
DECAY
,
–16–
is calculated. If multiple pins (such as the data bus) are dis-
abled, the measurement value is that of the last pin to stop
driving.
Figure 11. Voltage Reference Levels for AC Measure-
ments (Except Output Enable/Disable)
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high-impedance state to when they start
driving. The output enable time (t
a reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram. If multiple pins (such as
the data bus) are enabled, the measurement value is that of the
first pin to start driving.
Figure 13. Equivalent Device Loading for AC Measure-
ments (Including All Fixtures)
REFERENCE
OUTPUT
OUTPUT
(MEASURED)
(MEASURED)
SIGNAL
PIN
TO
OUTPUT
V
V
50pF
INPUT
OL
OH
Figure 12. Output Enable/Disable
OUTPUT STOPS
t
t
MEASURED
DIS
DRIVING
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
V
V
OH
OL
t
DECAY
I
I
OH
OL
(MEASURED) +0.5V
(MEASURED) – 0.5V
ENA
) is the interval from when
+1.5V
0.3V
1.5V
1.5V
2.0V
OUTPUT STARTS
1.0V
2.0V
DRIVING
t
ENA
V
(MEASURED)
V
(MEASURED)
OH
OL
REV. 0