KMSC8122TVT6400V Freescale Semiconductor, KMSC8122TVT6400V Datasheet - Page 5

• Manufacturer Part Number: KMSC8122TVT6400V
• Description: DSP 16BIT QUAD CORE 431-FCPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC81xx StarCorer
• Type: SC140 Corer

Specifications of KMSC8122TVT6400V

• Interface: DSI, Ethernet, RS-232
• Clock Rate: 400MHz
• Non-volatile Memory: External
• On-chip Ram: 1.436MB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.10V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 431-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
Ethernet Controller
Feature
• Designed to comply with IEEE Std 802® including IEEE Std. 802.3™, 802.3u™, 802.3x™, and 802.3ac™.
• Three Ethernet physical interfaces:
• Full and half-duplex support.
• Full-duplex flow control (automatic PAUSE frame generation or software programmed PAUSE frame generation
• Support of out-of-sequence transmit queue (for initiating flow-control).
• Programmable maximum frame length supports jumbo frames (up to 9.6k) and virtual local area network (VLAN)
• Retransmission from transmit FIFO following a collision.
• CRC generation and verification of inbound/outbound packets.
• Address recognition:
• Pattern matching:
• Filing of receive frames based on pattern match; prioritization of frames.
• Insertion with expansion or replacement for transmit frames; VLAN tag insertion.
• RMON statistics.
• Master DMA on the local bus for fetching descriptors and accessing the buffers.
• Serial interface can be exposed either on GPIO pins or on the high ms bits of the DSI/system when the DSI and
• MPC8260(PQ2) 8 byte width buffer descriptor mode as well as 32 byte width buffer descriptor mode.
• MII Bridge (MIIGSK):
• SMII features:
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and recognition).
tags and priority.
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the system bus are both 32 bits.
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10/100 Mbps MII.
10/100 Mbps RMII.
10/100 Mbps SMII.
Each exact match can be programmed to be accepted or rejected.
Broadcast address (accept/reject).
Exact match 48-bit individual (unicast) address.
Hash (256-bit hash) check of individual (unicast) addresses.
Hash (256-bit hash) check of group (multicast) addresses.
Promiscuous mode.
Up to 16 unique 4-byte patterns.
Pattern match on bit-basis.
Matching range up to 256 bytes deep into the frame.
Offsets to a maximum of 252 bytes.
Programmable pattern size in 4-byte increments up to 64 bytes.
Accept or reject frames if a match is detected.
Up to eight unicast addresses for exact matches.
Pattern matching accepts/rejects IP addresses.
Programmable selection of the 50 MHz RMII reference clock source (external or internal).
Independent 2 bit wide transmit and receive data paths.
Six operating modes.
Four general-purpose control signals.
Programmable transmitted inter-frame bits to support inter-frame gap for frames in the SMII domain.
Multiplexed only with GPIO signals
Convey complete MII information between the PHY and MAC.
Allow direct MAC-to-MAC communication in SMII mode.
Can generate an interrupt request line while receiving inter-frame segments.
MSC8122 Product Brief, Rev. 6
Description
Features
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