ADSP-21375KSWZ-2B Analog Devices Inc, ADSP-21375KSWZ-2B Datasheet - Page 43

IC DSP 32BIT 266MHZ 208-MQFP

ADSP-21375KSWZ-2B

Manufacturer Part Number
ADSP-21375KSWZ-2B
Description
IC DSP 32BIT 266MHZ 208-MQFP
Manufacturer
Analog Devices Inc
Series
SHARC®r
Type
Floating Pointr

Specifications of ADSP-21375KSWZ-2B

Package / Case
208-LQFP
Interface
DAI, DPI
Operating Temperature
0°C ~ 70°C
Clock Rate
266MHz
Non-volatile Memory
ROM (256 kB)
On-chip Ram
64kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Mounting Type
Surface Mount
Svhc
No SVHC (18-Jun-2010)
Base Number
21375
Core Frequency Typ
266MHz
Dsp Type
Floating Point
Mmac
532
No. Of Pins
208
Interface Type
SPI, UART
Rohs Compliant
Yes
Operating Temperature Range
0°C To +70°C
Package
208LQFP EP
Numeric And Arithmetic Format
Floating-Point
Maximum Speed
266 MHz
Ram Size
64 KB
Device Million Instructions Per Second
266 MIPS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-21375KSWZ-2B
Manufacturer:
BB
Quantity:
116
Part Number:
ADSP-21375KSWZ-2B
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Universal Asynchronous Receiver-Transmitter
(UART) Port—Receive and Transmit Timing
Figure 31
The maximum baud rate is PCLK/16 where PCLK = 1/t
shown in
Table 41. UART Port
1
Parameter
Timing Requirement
t
Switching Characteristic
t
UART signals TXD and RXD are routed through DPI P14-1 pins using the SRU.
TXD
RXD
1
1
TRANSMIT
RECEIVE
Figure 31
describes UART port receive and transmit operations.
UART RECEIVE
UART TRANSMIT
DPI_P14
DPI_P14
INTERRUPT
INTERNAL
INTERRUPT
INTERNAL
[RXD]
[TXD]
Incoming Data Pulse Width
Incoming Data Pulse Width
-
-
there is some latency between the genera-
1
1
START
t RXD
t TXD
Figure 31. UART Port—Receive and Transmit Timing
Rev. B | Page 43 of 52 | June 2008
PCLK
. As
DATA(5
DATA(5
-
-
8)
8)
tion of internal UART interrupts and the external data
operations. These latencies are negligible at the data transmis-
sion rates for the UART.
Min
16t
16t
STOP
STOP(1
PCLK
PCLK
–1
–1
-
2)
UART TRANSMIT BIT SET BY PROGRAM;
UART RECEIVE BIT SET BY DATA STOP;
CLEARED BY WRITE TO TRANSMIT
ADSP-21371/ADSP-21375
CLEARED BY FIFO READ
Max
Unit
ns
ns

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