XC95288XV-7FG256C Xilinx Inc, XC95288XV-7FG256C Datasheet - Page 4

• Manufacturer Part Number: XC95288XV-7FG256C
• Description: IC CPLD 2.5V ISP 256-FBGA
• Manufacturer: Xilinx Inc
• Series: XC9500XVr

Specifications of XC95288XV-7FG256C

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 2.37 V ~ 2.62 V
• Number Of Logic Elements/blocks: 16
• Number Of Macrocells: 288
• Number Of Gates: 6400
• Number Of I /o: 192
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-FBGA
• Voltage: 2.5V
• Memory Type: FLASH
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -

XC95288XV High-Performance CPLD
Supported I/O Standards
Table 1: IOSTANDARD Options
The XC95288XV CPLD features both LVCMOS and LVTTL
I/O implementations. See
Absolute Maximum Ratings
Recommended Operation Conditions
4
Notes:
1.
2.
3.
LVTTL
LVCMOS2
X25TO18
IOSTANDARD
Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the
device pins may undershoot to –2.0V or overshoot to +3.6V, provided this over- or undershoot lasts less than 10 ns and with the
forcing current being limited to 200 mA.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
For solder specifications, see
Symbol
Symbol
V
V
V
T
V
CCINT
V
V
V
CCIO
CCIO
V
V
STG
T
CC
TS
IN
IH
IL
O
J
Supply voltage for internal logic
and input buffers
Supply voltage for output drivers for 3.3V operation
Supply voltage for output drivers for 2.5V operation
Supply voltage for output drivers for 1.8V operation
Low-level input voltage
High-level input voltage
Output voltage
Supply voltage relative to GND
Supply voltage for output drivers
Input voltage relative to GND
Voltage applied to 3-state output
Storage temperature (ambient)
Junction temperature
V
3.3V
2.5V
1.8V
Table 1
CCIO
Xilinx
for I/O standard voltages.
Packaging.
Description
(1)
Parameter
(1)
www.xilinx.com
Commercial T
Industrial T
The LVTTL I/O standard is a general purpose EIA/JEDEC
standard for 3.3V applications that use an LVTTL input
buffer and Push-Pull output buffer. The LVCMOS2 standard
is used in 2.5V applications.
XC9500XV CPLDs are also 1.8V I/O compatible. The
X25TO18 setting is provided for generating 1.8V compatible
outputs from a CPLD normally operating in a 2.5V environ-
ment. The ISE software automatically groups outputs with
matching IOSTANDARD settings into the same V
when no location constraints are specified. The default I/O
Standard for pads without IOSTANDARD attributes is
LVTTL for XC9500XV devices.
A
= –40
A
= 0
o
o
C to +85
C to +70
o
o
C
C
–65 to +150
–0.5 to 2.7
–0.5 to 3.6
–0.5 to 3.6
–0.5 to 3.6
Value
+150
2.37
2.37
2.37
1.71
Min
3.0
1.7
0
0
DS050 (v3.0) June 25, 2007
Product Specification
V
Max
2.62
2.62
2.62
1.89
3.6
0.8
3.6
CCIO
Units
o
o
CCIO
V
V
V
V
C
C
Units
V
V
V
V
V
V
V
bank
R