CY39100V484B-125BBC Cypress Semiconductor Corp, CY39100V484B-125BBC Datasheet - Page 39
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CY39100V484B-125BBC
Manufacturer Part Number
CY39100V484B-125BBC
Description
IC CPLD 100K GATE 484-FBGA
Manufacturer
Cypress Semiconductor Corp
Series
Delta 39K™ ISR™r
Datasheet
1.CY39030V208-125NTXC.pdf
(91 pages)
Specifications of CY39100V484B-125BBC
Programmable Type
In-System Reprogrammable™ (ISR™) Flash
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
2.5V, 3.3V
Number Of Macrocells
1536
Number Of Gates
144000
Number Of I /o
302
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
484-FBGA
Voltage
1.8V, 2.5V, 3.3V
Memory Type
FLASH
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Number Of Logic Elements/cells
-
Other names
CY39100V484B-125
Switching Waveforms
Document #: 38-03039 Rev. *D
Cypress Semiconductor ID
Family Type
39 = Delta39K Family
Gate Density
30=30k Usable Gates
50=50k Usable Gates
100=100k Usable Gates
Operating Reference Voltage
V = 3.3V or 2.5V Supply Voltage
Z = 1.8V
Pin Count
208 = 208 Leads
256 = 256 Balls
388 = 388 Balls
484 = 484 Balls
676 = 676 Balls
HALF-FULL/
PROGRAMMABLE
ALMOST FULL
FLAGS
PROGRAMMABLE
ALMOST EMPTY
EMPTY/FULL
FLAGS
Channel Memory Synchronous FIFO Master Reset Timing
MASTER
RESET INPUT
READ ENABLE /
WRITE ENABLE
REGISTERED
OUTPUT
Supply Voltage
165 = 165k Usable Gates
200 = 200k Usable Gates
C Y 3 9 1 0 0 V 6 7 6 - 2 0 0 M B C
(continued)
t
t
t
CHMFRSF
CHMFRSF
CHMFRSF
t
CHMFRS
PRELIMINARY
t
CHMFRSR
Package Type
N = Plastic Quad Flat Pack (PQFP)
NT = Thermally Enhanced Quad Flat Pack (EQFP)
BG = Ball Grid Array (BGA)
BB = Fine-pitch Ball Grid Array (FBGA)
MG = Self-Boot Solution -- Ball Grid Array
MB = Self-Boot Solution -- Fine Pitch Ball Grid Array
Speed
233 = 233 MHz
200 = 200 MHz
181 = 181 MHz
Operating Conditions
Commercial
Industrial
1.0-mm Lead Pitch
1.0-mm Lead Pitch
Delta39K™ ISR™
--40°C to +85°C
125 = 125 MHz
0°C to +70°C
83 = 83 MHz
CPLD Family
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