CY7C375I-125AC Cypress Semiconductor Corp, CY7C375I-125AC Datasheet - Page 4

• Manufacturer Part Number: CY7C375I-125AC
• Description: IC CPLD 128 MACROCELL 160LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: Ultralogic™r

Specifications of CY7C375I-125AC

• Memory Type: CMOS
• Programmable Type: In-System Reprogrammable™ (ISR™) CMOS
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 4.75 V ~ 5.25 V
• Number Of Logic Elements/blocks: 8
• Number Of Macrocells: 128
• Number Of I /o: 128
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-LQFP
• Voltage: 5V
• Family Name: FLASH370i
• # Macrocells: 128
• Number Of Usable Gates: 3200
• Frequency (max): 158.3MHz
• Propagation Delay Time: 10ns
• Number Of Logic Blocks/elements: 8
• # I/os (max): 128
• Operating Supply Voltage (typ): 5V
• In System Programmable: Yes
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 428-1472

Document #: 38-03029 Rev. *A
Pin Configurations
Functional Description
The 128 macrocells in the CY7C375i are divided between
eight logic blocks. Each logic block includes 16 macrocells, a
72 x 86 product term array, and an intelligent product term
allocator.
The logic blocks in the F
with an extremely fast and predictable routing resource—the
Programmable Interconnect Matrix (PIM). The PIM brings
flexibility, routability, speed, and a uniform delay to the inter-
connect.
Like all members of the F
in I/O resources. Every macrocell in the device features an
associated I/O pin, resulting in 128 I/O pins on the CY7C375i.
In addition, there is one dedicated input and four input/clock
pins.
Finally, the CY7C375i features a very simple timing model.
Unlike other high-density CPLD architectures, there are no
hidden speed delays such as fanout effects, interconnect
delays, or expander delays. Regardless of the number of
resources used or the type of application, the timing param-
eters on the CY7C375i remain the same.
M
G
R
N
H
D
C
B
P
K
F
E
A
L
J
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
109
106
105
102
100
98
96
95
94
91
89
86
83
80
78
LASH
LASH
(continued)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
/SDI
2
112
110
108
104
101
99
97
93
90
87
84
81
79
75
370i architecture are connected
370i family, the CY7C375i is rich
I/O
I/O
I/O
I/O
I/O
CLK
CLK
GND
I/O
I/O
I/O
I/O
GND
I/O
I/O
/I
/I
3
115
113
111
107
103
4
3
92
88
85
82
77
74
3
2
I/O
I/O
I/O
/SDO
GND
GND
I/O
I/O
I/O
V
V
V
4
CC
CC
CC
118
116
114
76
73
71
I/O
I/O
I/O
I/O
I/O
I/O
5
121
119
117
72
70
69
I/O
I/O
I/O
GND
I/O
I/O
6
123
122
120
68
67
I/O
I/O
I/O
Bottom View
I/O
I/O
I/O
7
V
V
CC
CC
126
125
124
66
65
64
ISR
I/O
8
GND
GND
GND
GND
I/O
PGA
I
127
2
EN
63
9
I/O
I/O
I/O
I/O
I/O
I/O
V
V
Logic Block
The number of logic blocks distinguishes the members of the
F
Each logic block is constructed of a product term array, a
product term allocator, and 16 macrocells.
Product Term Array
The product term array in the F
36 inputs from the PIM and outputs 86 product terms to the
product term allocator. The 36 inputs from the PIM are
available in both positive and negative polarity, making the
overall array size 72 x 86. This large array in each logic block
allows for very complex functions to be implemented in single
passes through the device.
Product Term Allocator
The product term allocator is a dynamic, configurable resource
that shifts product terms to macrocells that require them. Any
number of product terms between 0 and 16 inclusive can be
assigned to any of the logic block macrocells (this is called
product term steering). Furthermore, product terms can be
shared among multiple macrocells. This means that product
terms that are common to more than one output can be imple-
mented in a single product term. Product term steering and
CC
CC
LASH
60
61
62
0
1
2
10
GND
I/O
I/O
I/O
I/O
I/O
370i family. The CY7C375i includes eight logic blocks.
56
58
59
3
4
11
I/O
I/O
I/O
I/O
I/O
I/O
53
55
57
5
6
8
SMODE
12
I/O
GND
GND
I/O
I/O
V
V
V
I/O
I/O
I/O
CC
CC
CC
12
52
71
50
7
9
/
CLK
CLK1
I/O
I/O
GND
I/O
I/O
I/O
CLK
GND
I/O
I/O
I/O
I/O
I/O
13
/I1
/I
0
10
13
18
21
24
39
43
47
49
51
28
0
/SCLK
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
14
11
15
17
20
23
26
29
33
35
37
40
44
46
48
LASH
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
15
14
16
19
22
25
27
30
31
32
34
36
38
41
42
45
370i logic block includes
CY7C375i
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