ATF750CL-15PU Atmel, ATF750CL-15PU Datasheet - Page 5

• Manufacturer Part Number: ATF750CL-15PU
• Description: IC PLD HS 750 GATE 5.0V 24-PDIP
• Manufacturer: Atmel
• Series: ATF750C(L)r

Specifications of ATF750CL-15PU

• Programmable Type: In System Programmable (min 1K program/erase cycles)
• Delay Time Tpd(1) Max: 15.0ns
• Voltage Supply - Internal: 4.5 V ~ 5.5 V
• Number Of Macrocells: 10
• Number Of I /o: 10
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Features: Programmable
• Voltage: 5V
• Memory Type: CMOS
• Package: 24PDIP
• Family Name: ATF750CL
• Device System Gates: 750
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 10
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 41 MHz
• Number Of Product Terms Per Macro: 8
• Delay Time: 15 ns
• Number Of Programmable I/os: 10
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9. Bus-friendly Pin-keeper Input and I/Os
10. Input Diagram
11. I/O Diagram
0776L–PLD–11/08
All input and I/O pins on the ATF750C(L) have programmable “pin-keeper” circuits. If activated,
when any pin is driven high or low and then subsequently left floating, it will stay at that previous
high or low level.
This circuitry prevents unused input and I/O lines from floating to intermediate voltage levels,
which causes unnecessary power consumption and system noise. The keeper circuits eliminate
the need for external pull-up resistors and eliminate their DC power consumption.
Enabling or disabling of the pin-keeper circuits is controlled by the device type chosen in the
logic compiler device selection menu. Please refer to the software compiler table for more
details. Once the pin-keeper circuits are disabled, normal termination procedures are required
for unused inputs and I/Os.
DATA
INPUT
OE
PROTECTION
V
CIRCUIT
CC
ESD
V
CC
100K
PROGRAMMABLE
PROGRAMMABLE
OPTION
OPTION
100K
V
CC
ATF750C(L)
I/O
5