AD1953YSTRL7 Analog Devices Inc, AD1953YSTRL7 Datasheet
AD1953YSTRL7
Specifications of AD1953YSTRL7
Related parts for AD1953YSTRL7
AD1953YSTRL7 Summary of contents
Page 1
FEATURES 5 V 3-Channel Audio DAC System Digital Audio Output (2-Channel or 6-Channel Packed Mode) Accepts Sample Rates kHz 7 Biquad Filter Sections per Channel Dual Dynamic Processor with Arbitrary Input/Output Curve and Adjustable Time Constants ...
Page 2
AD1953 TABLE OF CONTENTS FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 3
SPECIFICATIONS TEST CONDITIONS, UNLESS OTHERWISE NOTED. Supply Voltages (AVDD, DVDD) 5.0 V Ambient Temperature 25°C Input Clock 12.288 MHz Input Signal 1.000 kHz 0 dB Full Scale Input Sample Rate 48 kHz Measurement Bandwidth kHz Word ...
Page 4
AD1953 DIGITAL I/O Parameter Input Voltage High ( Input Voltage High (V ) – RESETB IH Input Voltage Low ( Input Leakage ( 2 Input Leakage ( ...
Page 5
DIGITAL TIMING Parameter t MCLK Recommended Duty Cycle @ 12.288 MHz (256 f DMD t MCLK Recommended Duty Cycle @ 24.576 MHz (512 f DMD t MCLK Delay (All Mode) DMD t BCLK Low Pulsewidth DBH t BCLK High Pulsewidth ...
Page 6
... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Model AD1953YST AD1953YSTRL AD1953YSTRL7 EVAL-AD1953EB CONNECT CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD1953 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...
Page 7
Input/ Pin No. Mnemonic Output MCLK2 IN 3 MCLK1 IN 4 MCLK0 IN 5 AUXDATA IN 6 MUTE IN 7 DVDD 8 SDATA2 IN 9 BCLK2 IN 10 LRCLK2 IN 11 SDATA1 IN 12 BCLK1 IN 13 ...
Page 8
AD1953–Typical Performance Characteristics PERFORMANCE PLOTS The following plots demonstrate the performance achieved on the actual silicon. TPC 1 shows an FFT of a full-scale 1 kHz signal with a THD+N of –100 dB, which is dominated by a second harmonic. ...
Page 9
PRODUCT OVERVIEW (continued from page 1) An extensive SPI port allows click-free parameter updates, along with readback capability from any point in the algorithm flow. The AD1953 also includes ADI’s patented multibit Σ-∆ DAC architecture. This architecture provides 112 dB ...
Page 10
AD1953 Pin Functions All input pins have a logic threshold compatible with TTL input levels, and may therefore be used in systems with 3.3 V logic. All digital output levels are controlled by the ODVDD pin, which may range from ...
Page 11
DCSOUT pin. Table XXI shows the Pro- gram Counter Trap values and register-select values that should be used to tap various internal points of the algorithm flow. The DCSOUT pin is meant to be used in ...
Page 12
AD1953 EQ AND CROSSOVER FILTERS IN 7 BIQUAD CROSSOVER HPF/ LEFT DE-EMPHASIS FILTERS (2 FILTERS) HPF BIQUAD CROSSOVER DE-EMPHASIS RIGHT FILTERS (2 FILTERS) SUB CHANNEL L/R MIX CROSSOVER (3 FILTERS) SIGNAL PROCESSING Signal Processing Overview Figure 2 shows ...
Page 13
SIGN EXTENTION DATA IN SERIAL PORT 1.23 3.23 Figure 4. Numeric Precision and Clipping Structure Each section of this flow diagram will be explained in detail on the following pages. Numeric Formats It is common in DSP systems to ...
Page 14
AD1953 first seven biquads would be used for speaker equalization and/ or tone controls, and the remaining filters would be programmed to function as crossover filters. Note that there is a common equalization section used for both the main and ...
Page 15
The spread_level is a linear number in 2.20 format that multiplies the processed left-right signal before it is added to or subtracted from the main channels. The parameter alpha_spread is related to the cutoff frequency of the first-order low-pass filter ...
Page 16
AD1953 INPUT WAVEFORM HOLD TIME, SPI- PROGRAMMABLE Figure 9. Using the Hold and Release Time Feature Using this idea of a modified rms algorithm, the true rms value is still obtained for all but the lowest frequency signals, while the ...
Page 17
In the look-ahead compressor, the gain has already been reduced by the time the tone-burst signal arrives at the multiplier input. Note that when using a look-ahead compressor impor- tant to set the detector hold time to a ...
Page 18
AD1953 was not so sensitive to overload, then the compressor would be too pessimistic and the volume of the woofer would be reduced. If, on the other hand, the biquad filter were designed to follow the woofer excursion curve of ...
Page 19
The detailed data format diagram for continuous-mode opera- tion is given in SPI Read/Write data formats. A sample timing diagram for a single SPI WRITE operation to the parameter RAM is shown in Figure 16. Table I. SPI Word Format ...
Page 20
AD1953 SPI Address Register Name 0–255 Parameter RAM 256 SPI Control Register 1 257 SPI Control Register 2 258 Volume 0 259 Volume 1 260 Volume 2 261 Volume 3 262 Volume 4 263 Volume 5 264 Volume 6 265 ...
Page 21
Control Register 1 Control Register 14-bit register that controls data capture modes, serial modes, de-emphasis, mute, power-down, and SPI-to-memory transfers. Table III documents the contents of this register. Table IV details the two bits in the register’s ...
Page 22
AD1953 Table IV. Control Register 1 READ Definition Register Bits Function 1 DSP Core Shutdown Complete 1 = Shutdown Complete 0 = Not Shut Down 0 Safe Memory Load Complete 1 = Complete (Note: Cleared after Read Not ...
Page 23
Volume Registers The AD1953 contains eight 22-bit volume registers, one each for the left, right, and subwoofer channels and an additional five registers to be used by custom programs used in multichannel applications. These registers are special because when the ...
Page 24
AD1953 Table VI. Parameter RAM Contents (continued) Address Function 72 IIR0 Xover Left b2 73 IIR0 Xover Left a1 74 IIR0 Xover Left a2 75 IIR1 Xover Left b0 76 IIR1 Xover Left b1 77 IIR1 Xover Left b2 78 ...
Page 25
Soft Shutdown Mechanism When writing large amounts of data to the program or parameter RAM, the processor core should be halted to prevent unpleasant noises from appearing at the audio output. Figure 18 shows a graphical representation of this mechanism’s ...
Page 26
AD1953 SPI READ/WRITE DATA FORMATS The read/write formats of the SPI port are designed to be byte- oriented. This allows for easy programming of common microcontroller chips to fit into a byte-oriented format; 0s are appended to the data fields ...
Page 27
Byte 0 Byte 1 00000, R/Wb, Adr[9:8] Adr[7:0] NOTES 1. ProgCount[8:0] = value of program counter where trap occurs (see Table XXI). 2. RegSel[1:0] selects one of four registers (see Data Capture Register section). Table XVII. Data_Capture_Serial Out Register (Address ...
Page 28
AD1953 Setting the Data and MCLK Input Selectors The AD1953 contains input selectors for both the serial data inputs as well as the MCLK input. This allows the AD1953 to select a variety of input and clock sources with no ...
Page 29
Table XXI. Data Capture Trap Indexes and Register Select Program Count Signal Description Index (9 Bits) HPF Out Left 15 HPF Out Right 259 De-emphasis Out Left 19 De-emphasis Out Right 263 Left Biquad 0 Output 34 Left Biquad 1 ...
Page 30
AD1953 SERIAL DATA INPUT/OUTPUT PORTS The AD1953’s flexible serial data input port accepts data in twos complement, MSB first format. The left channel data field always precedes the right channel data field. The serial mode is set by using mode ...
Page 31
For the DSP serial port mode, LRCLK must pulse high for at least one bit clock period before the MSB of the left channel is valid, and LRCLK must pulse HIGH again for at least one bit clock period before ...
Page 32
AD1953 The sub output of the AD1953 has a lower drive strength than the left and right output pins (± 0.25 mA peak versus ± 0.5 mA peak for the left and right outputs). For this reason best ...
Page 33
APPENDIX Cookbook Formulae for Audio EQ Biquad Coefficients (adapted from Robert Bristow-Johnson’s Internet posting) For designing a Parametric EQ, follow the steps below. 1. Given: Frequency Q dB_Gain sample_rate 2. Compute Intermediate Variables A = 10^(dB_Gain/40) × π × omega ...
Page 34
AD1953 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE ROTATED 90 CCW OUTLINE DIMENSIONS 48-Lead Low Profile Quad Flat Package [LQFP] (ST-48) Dimensions shown in millimeters 0.75 1.60 0.60 MAX 0. SEATING PLANE 10 6 0.20 2 0.09 VIEW ...
Page 35
–35– ...
Page 36
–36– ...