LFEC3E-3F256I Lattice, LFEC3E-3F256I Datasheet - Page 62

• Manufacturer Part Number: LFEC3E-3F256I
• Description: FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
• Manufacturer: Lattice

Specifications of LFEC3E-3F256I

• Package: 256FBGA
• Family Name: LatticeEC
• Device Logic Units: 3100
• Maximum Internal Frequency: 340 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 160
• Ram Bits: 56320
• In System Programmability: Yes
• Lead Free Status / Rohs Status: Contains lead / RoHS non-compliant

Lattice Semiconductor
Figure 3-12. sysCONFIG Parallel Port Read Cycle
Figure 3-13. sysCONFIG Parallel Port Write Cycle
WRITEN
WRITEN
1. In Master Parallel Mode the FPGA provides CCLK. In Slave Parallel Mode the external device provides CCLK.
1. In Master Parallel Mode the FPGA provides CCLK. In Slave Parallel Mode the external device provides CCLK.
CCLK
CS1N
BUSY
D[0:7]
CCLK
CS1N
BUSY
D[0:7]
CSN
CSN
1
1
t
SUCBDI
t
t
t
t
SUWD
SUCS
SUWD
SUCS
Byte 0
Byte 0
t
t
BSCL
BSCL
3-26
Byte 1
Byte 1
t
t
CORD
HCBDI
Byte 2
t
t
DCB
DCB
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
t
Byte 2
t
BSCYC
t
BSCYC
t
BSCH
BSCH
Byte n
Byte n
t
HCS
t
t
t
HCS
HWD
HWD