LFEC3E-3F256I Lattice, LFEC3E-3F256I Datasheet - Page 5

• Manufacturer Part Number: LFEC3E-3F256I
• Description: FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
• Manufacturer: Lattice

Specifications of LFEC3E-3F256I

• Package: 256FBGA
• Family Name: LatticeEC
• Device Logic Units: 3100
• Maximum Internal Frequency: 340 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 160
• Ram Bits: 56320
• In System Programmability: Yes
• Lead Free Status / Rohs Status: Contains lead / RoHS non-compliant

Lattice Semiconductor
Figure 2-1. Simplified Block Diagram, LatticeEC Device (Top Level)
Figure 2-2. Simplified Block Diagram, LatticeECP-DSP Device (Top Level)
sysCONFIG Programming
Port (includes dedicated
and dual use pins)
sysCONFIG Programming
Port (includes dedicated
and dual use pins)
Programmable
Functional Unit (PFU)
Programmable
Functional Unit (PFU)
sysDSP Block
Programmable I/O Cell
(PIC) includes sysIO
Interface
Programmable I/O Cell
(PIC) includes sysIO
Interface
2-2
LatticeECP/EC Family Data Sheet
PFF (PFU without
RAM)
sysCLOCK PLL
PFF (Fast PFU
without RAM/ROM)
sysCLOCK PLL
sysMEM Embedded
Block RAM (EBR)
JTAG Port
sysMEM Embedded
Block RAM (EBR)
JTAG Port
Architecture