K4S561633CRL75000 Samsung Semiconductor, K4S561633CRL75000 Datasheet - Page 7

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K4S561633CRL75000

Manufacturer Part Number
K4S561633CRL75000
Description
Manufacturer
Samsung Semiconductor
Type
SDRAMr
Datasheet

Specifications of K4S561633CRL75000

Organization
16Mx16
Density
256Mb
Address Bus
13b
Access Time (max)
7/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3V
Package Type
CSP
Operating Temp Range
-25C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Supply Current
130mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
K4S561633C-R(B)L/N/P
AC CHARACTERISTICS
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
CLK cycle time
CLK to valid output delay
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output in Hi-Z
Note :
1. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of
a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea
repeater use.
Parameter
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
(AC operating conditions unless otherwise noted)
Symbol
t
t
t
t
t
SAC
t
t
t
t
SHZ
SLZ
O H
C C
C H
C L
SS
SH
Min
7.5
9.5
2.5
2.5
2.5
2.5
2.0
1.0
1
-
-
- 75
1000
Max
5.4
5.4
7
7
-
-
Min
9.5
9.5
2.5
2.5
2.5
1.5
3
3
1
-
-
-1H
1000
Max
7
7
7
7
-
-
Min
9.5
2.5
2.5
2.5
2.5
1.5
12
25
3
3
1
-1L
CMOS SDRAM
1000
Max
Rev. 1.4 Dec. 2002
20
20
7
8
7
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1,2
1
2
3
3
3
3
2

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