K4S161622D-TC10000 Samsung Semiconductor, K4S161622D-TC10000 Datasheet - Page 32
![no-image](/images/manufacturer_photos/0/5/578/samsung_semiconductor_sml.jpg)
K4S161622D-TC10000
Manufacturer Part Number
K4S161622D-TC10000
Description
Manufacturer
Samsung Semiconductor
Datasheet
1.K4S161622D-TC10000.pdf
(43 pages)
Specifications of K4S161622D-TC10000
Lead Free Status / Rohs Status
Supplier Unconfirmed
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CLOCK
Page Write Cycle at Different Bank @Burst Length=4
K4S161622D
A
ADDR
10
DQM
CKE
RAS
CAS
WE
/AP
DQ
CS
BA
*Note :
0
Row Active
(A-Bank)
RAa
RAa
1
1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and the precharge banks must be the same.
2
3
(A-Bank)
DAa0 DAa1 DAa2
Write
CAa
4
Row Active
(B-Bank)
RBb
RBb
5
6
DAa3 DBb0 DBb1 DBb2 DBb3 DAc0 DAc1 DBd0 DBd1
tCDL
7
(B-Bank)
Write
CBb
8
9
HIGH
10
11
(A-Bank)
Write
CAc
12
13
(B-Bank)
Write
CBd
14
*Note 1
15
tRDL
(Both Banks)
Precharge
CMOS SDRAM
Rev 1.5 Sep. '00
16
*Note 2
17
18
: Don't care
19
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