EVAL-AD7787EB Analog Devices Inc, EVAL-AD7787EB Datasheet - Page 17

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EVAL-AD7787EB

Manufacturer Part Number
EVAL-AD7787EB
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD7787EB

Lead Free Status / Rohs Status
Not Compliant
Continuous Read Mode
Rather than write to the communications register each time a
conversion is complete to access the data, the AD7787 can be
placed in continuous read mode. By writing 00111100
(Channel AIN1) or 00111101 (Channel AIN2) to the
communications register, the user only needs to apply the
appropriate number of SCLK cycles to the ADC, and the 24-bit
word is automatically placed on the DOUT/ RDY line when a
conversion is complete.
When DOUT/ RDY goes low to indicate the end of a
conversion, sufficient SCLK cycles must be applied to the ADC,
and the data conversion is placed on the DOUT/ RDY line.
When the conversion is read, DOUT/ RDY returns high until
the next conversion is available. In this mode, the data can only
be read once. Also, the user must ensure that the data-word is
DOUT/RDY
SCLK
DIN
CS
0x3C
Figure 15. Continuous Read
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DATA
read before the next conversion is complete. If the user has not
read the conversion before the completion of the next
conversion, or if insufficient serial clocks are applied to the
AD7787 to read the word, the serial output register is reset
when the next conversion is complete, and the new conversion
is placed in the output serial register.
To exit the continuous read mode, the instruction 001110XX
must be written to the communications register while the RDY
pin is low. While in the continuous read mode, the ADC
monitors activity on the DIN line so that it can receive the
instruction to exit the continuous read mode. Additionally, a
reset occurs if 32 consecutive 1s are seen on DIN. Therefore,
DIN should be held low in continuous read mode until an
instruction is written to the device.
DATA
DATA
AD7787