DS92LV8028TUF National Semiconductor, DS92LV8028TUF Datasheet - Page 4

• Manufacturer Part Number: DS92LV8028TUF
• Manufacturer: National Semiconductor

Specifications of DS92LV8028TUF

• Number Of Elements: 8
• Number Of Receivers: 10
• Number Of Drivers: 1
• Input Type: CMOS/TTL
• Operating Supply Voltage (typ): 3.3V
• Output Type: Serializer
• Differential Output Voltage: 550mV
• Transmission Data Rate: 660Mbps
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / Rohs Status: Not Compliant

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Symbol
Serializer Switching Characteristics
t
Over recommended operating supply and temperature ranges unless otherwise specified.(Notes 2, 3)
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Typical values are given for V
Note 3: Current into device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground except VOD, and ∆VOD
which are differential voltages.
Note 4: BIST_SEL pins are pull-up internally.
Note 5: t
Note 6: t
Note 7: t
distribution of 0V (differential) crossing in comparsion with the ideal bit position. See Figure 9
AC Timing Diagrams and Test Circuits
t
SKEW
t
t
t
t
t
MCR
t
RJIT
DJIT
STE
STD
ICR
SD
LLHT
RJIT
DJIT
@
@
Channel to Channel
Deterministic Jitter,
Individual Channel
Speed Test Disable
Speed Test Enable
, t
Master Power up
specification is the rms jitter measurement of the serializer output when the device is transmitting SYNC pattern.
specification is measured with the serializer output transmitting PRBS pattern from the internal BIST mode. It is a measurement of the center
Serializer Delay
Power up Time
LHLT
Random Jitter
Parameter
Figure 9
, t
Skew
Time
Time
Time
DJIT
and t
RJIT
specifications are Guaranteed by Design using statistical analysis.
CC
C
C
C
C
C
= 3.3V and T
L
L
L
L
L
=10pF to GND
=10pF to GND
=10pF to GND
=10pF to GND
=10pF to GND
Conditions
R
R
R
R
R
R
R
Figure 7
L
L
L
(Note 5)
(Note 6)
L
(Note 5)
(Note 7)
L
L
L
= 100Ω,
= 100Ω,
= 100Ω,
= 100Ω,
= 100Ω
= 100Ω
= 100Ω
FIGURE 1. ’Worst Case Icc Test Pattern
A
= +25˚C.
DOn-, MS_PWDN
DINn(0-9), TCLK,
BIST_SEL (0:3),
DOn-, PWDNn
TCLK, DOn+,
TCLK, DOn+,
TCLK, DOn+,
DOn+, DOn-
BIST_ACT,
Pin/Freq.
Figure 6
25 MHz
66 MHz
25MHz
66MHz
25MHz
66MHz
DOn-
(Continued)
4
t
TCP
510*t
60*t
−130
−190
Min
+ 3.2
TCP
TCP
20027203
t
TCP
63*t
10*t
7*t
18.4
Typ
130
−45
−92
7.5
80
TCP
+ 3.5
TCP
TCP
513*t
t
70*t
TCP
Max
20.7
−40
8.8
40
TCP
+ 6
TCP
Units
ns
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps