SSTUH32865ET-T NXP Semiconductors, SSTUH32865ET-T Datasheet - Page 11

• Manufacturer Part Number: SSTUH32865ET-T
• Manufacturer: NXP Semiconductors

Specifications of SSTUH32865ET-T

• Logic Family: SSTU
• Logical Function: Reg Bfr W/ParityTst
• Number Of Elements: 1
• Number Of Bits: 28
• Number Of Inputs: 28
• Number Of Outputs: 56
• High Level Output Current: -12mA
• Low Level Output Current: 12mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 450(Min)MHz
• Mounting: Surface Mount
• Pin Count: 160
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

Philips Semiconductors
9397 750 14136
Product data sheet
Fig 4. RESET switches from LOW to HIGH
PTYERR
(1) After RESET is switched from LOW to HIGH, all data and PARIN input signals must be set and held LOW for a minimum
RESET
PARIN
DCSn
Dn
CK
CK
Qn
(1)
time of t
ACT(max)
HIGH, LOW, or Don't care
to avoid false error.
t
ACT
m
HIGH or LOW
t
PDM
Rev. 01 — 11 March 2005
, t
CK to Q
PDMSS
t
su
1.8 V high output drive DDR registered buffer with parity
m + 1
CK to PTYERR
t
h
t
t
su
PHL
m + 2
t
h
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
m + 3
CK to PTYERR
SSTUH32865
t
PHL
, t
PLH
m + 4
002aaa983
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