IS43R32800B-6BLI ISSI, Integrated Silicon Solution Inc, IS43R32800B-6BLI Datasheet - Page 29

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IS43R32800B-6BLI

Manufacturer Part Number
IS43R32800B-6BLI
Description
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
DDR SDRAMr
Datasheet

Specifications of IS43R32800B-6BLI

Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
700ps
Maximum Clock Rate
333MHz
Operating Supply Voltage (typ)
2.5V
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Pin Count
144
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
IS43R32800B
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00D
03/19/08
BURST INTERRUPTION
Read I nterru pted by Read
RE AD to RE AD interval is minimum 1CL K.
R ead I nterru pted by prechar ge
minimum 1 CL K. A P RE command to output disable latency is equivalent to the /CA S L atency.
As a result, RE AD to PR E i nterval determines valid data length to be output. T he figure below
shows examples of B L=8.
Burst read operation can be interrupted by new read of any bank. R andom column access is allowed.
Burst read operation can be interrupted by precharge of the same bank. R EA D to PRE interval is
CL=2 .0
Command
A0-7 ,9-11
BA 0,1
/CLK
DQS
CL K
A8
DQ
Command
Command
Command
RE AD RE AD
/CLK
DQS
DQS
DQS
CL K
00
Yi
DQ
DQ
DQ
0
00
Yj
0
Read Int err upted by Prechar ge (B L=8)
RE AD
Read Int err upted by Read (B L=8, CL=2 )
RE AD
RE AD
Qai0 Qai1 Qaj0 Qaj1 Qaj2 Qaj3 Qak0 Qak1 Qak2 Qak3 Qak4 Qak5 Qal0 Qal1 Qal2
RE AD
10
PR E
Yk
0
PR E
Q0
Q0
Q0
0
Q1
Q1
Q1
PR E
Q2
Q2
RE AD
Q3
Q3
01
Yl
Q4
Q5
Qal3 Qal4 Qal5 Qal6 Qal7
29

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