MT46H32M16LFCK-75TR Micron Technology Inc, MT46H32M16LFCK-75TR Datasheet - Page 76

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MT46H32M16LFCK-75TR

Manufacturer Part Number
MT46H32M16LFCK-75TR
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet

Specifications of MT46H32M16LFCK-75TR

Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
6.5/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
90mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Figure 38: Random WRITE Cycles
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
Command
Address
DQ
DQS
CK#
DM
CK
3,4
Notes:
WRITE
Bank,
Col b
T0
1,2
1. Each WRITE command can be to any bank.
2. Programmed BL = 2, 4, 8, or 16 in cases shown.
3. D
4. b' (or x, n, a, g) = the next data-in following D
t
DQSS (NOM)
med burst order.
IN
b (or x, n, a, g) = data-in for column b (or x, n, q, g).
WRITE
Bank,
Col x
D
T1
IN
1,2
T1n
D
IN
WRITE
Bank,
Col n
T2
D
IN
1,2
76
T2n
D
IN
512Mb: x16, x32 Mobile LPDDR SDRAM
WRITE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank,
Col a
T3
D
IN
1,2
T3n
D
Don’t Care
IN
IN
b (x, n, a, g) according to the program-
WRITE
Bank,
Col g
T4
D
IN
1,2
T4n
D
IN
Transitioning Data
© 2004 Micron Technology, Inc. All rights reserved.
WRITE Operation
NOP
D
T5
IN
T5n
D
IN

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