COM20020I3V-HT Standard Microsystems (SMSC), COM20020I3V-HT Datasheet - Page 8

• Manufacturer Part Number: COM20020I3V-HT
• Manufacturer: Standard Microsystems (SMSC)

Specifications of COM20020I3V-HT

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

4.0 DESCRIPTION OF PIN FUNCTIONS FOR TQFP
Revision 12-06-06
7, 9, 10,
PIN NO
44, 45,
1, 2, 4,
47, 48,
12, 13
14-17
3, 5,
46
37
39
31
34
36
42
26
33
35
38
40
Address
0-2
Data 0-7
N/C
nWrite/
Direction
nRead/
nData
Strobe
nReset In
nInterrupt
nChip
Select
N/C
Read/Write
Bus Timing
Select
N/C
Power
Supply
Power
Supply
N/C
NAME
A0/nMUX
A1
A2/ALE
AD0-AD2,
D3-D7
N/C
nWR/DIR
nRD/nDS
nRESET
nINTR
nCS
N/C
BUSTMG
N/C
VDD
VDD
N/C
SYMBOL
MICROCONTROLLER INTERFACE
DATASHEET
PWR
PWR
OUT
OUT
OUT
I/O
I/O
I/O
IN
IN
IN
IN
IN
IN
IN
IN
On a non-multiplexed mode, A0-A2 are address
input bits. (A0 is the LSB) On a multiplexed
address/data bus, nMUX tied Low, A1 is left open,
and ALE is tied to the Address Latch Enable signal.
A1 is connected to an internal pull-up resistor.
On a non-multiplexed bus, these signals are used as
the lower byte data bus lines. On a multiplexed
address/data bus, AD0-AD2 act as the address lines
(latched by ALE) and as the low data lines. D3-D7
are always used for data only. These signals are
connected to internal pull-up resistors.
Non-connection
nWR is for 80xx CPU, nWR is Write signal input.
Active Low.
DIR is for 68xx CPU, DIR is Bus Direction signal
input. (Low: Write, High: Read.)
nRD is for 80xx CPU, nRD is Read signal input.
Active Low.
nDS is for 68xx CPU, nDS is Data Strobe signal
input. Active Low.
Hardware reset signal. Active Low.
Interrupt signal output. Active Low.
Chip Select input. Active Low.
Non-connection
Read and Write Bus Access Timing mode selecting
signal. Status of this signal effects CPU and DMA
Timing.
L: High speed timing mode (only for non-multiplexed
H: Normal timing mode
This signal is connected to internal pull-up registers.
+3.3 volts power supply pins.
Non-connection
8
bus)
5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
DESCRIPTION
SMSC COM20020I 3.3V