AD5764RCSUZ Analog Devices Inc, AD5764RCSUZ Datasheet - Page 30

• Manufacturer Part Number: AD5764RCSUZ
• Description: IC DAC QUAD 16BIT VOUT 32-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD5764RCSUZ

• Data Interface: Serial
• Design Resources: High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5764 (CN0006)
• Settling Time: 8µs
• Number Of Bits: 16
• Number Of Converters: 4
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 275mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP, 32-VQFP
• Resolution (bits): 16bit
• Sampling Rate: 1.26MSPS
• Input Channel Type: Serial
• Supply Voltage Range - Digital: 2.7V To 5.25V
• Supply Current: 3.55mA
• Digital Ic Case Style: QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5764R
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. Design the PCB on which the
AD5764R is mounted such that the analog and digital sections
are separated and confined to certain areas of the board. If the
AD5764R is in a system where multiple devices require an
AGNDx-to-DGND connection, establish the connection at one
point only. Establish the star ground point as close as possible to
the device. The AD5764R should have ample supply bypassing of
10 μF in parallel with 0.1 μF on each supply located as close to
the package as possible, ideally right up against the device. The
10 μF capacitors are of the tantalum bead type. The 0.1 μF
capacitor should have low effective series resistance (ESR) and low
effective series inductance (ESI), such as the common ceramic
types that provide a low impedance path to ground at high
frequencies to handle transient currents due to internal logic
switching.
The power supply lines of the AD5764R should use as large a trace
as possible to provide low impedance paths and reduce the effects
of glitches on the power supply line. Shield fast-switching signals,
such as clocks, with digital ground to avoid radiating noise to other
parts of the board; they should never be run near the reference
inputs. A ground line routed between the SDIN and SCLK lines
helps reduce cross talk between them. (A ground line is not
required on a multilayer board because it has a separate ground
plane; however, it is helpful to separate the lines.) It is essential to
minimize noise on the reference inputs because it couples
through to the DAC output. Avoid crossover of digital and
analog signals. Run traces on opposite sides of the board at right
*ADDITIONAL PINS OMITTED FOR CLARITY.
MICROCONTROLLER
SERIAL CLOCK OUT
SERIAL DATA OUT
CONTROL OUT
SYNC OUT
V
V
V
V
IA
IB
IC
ID
ADuM1400*
Figure 44. Isolated Interface
Rev. B | Page 30 of 32
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angles to each other to reduce the effects of feedthrough on the
board. A microstrip technique is recommended but not always
possible with a double-sided board. In this technique, the com-
ponent side of the board is dedicated to the ground plane, and
the signal traces are placed on the solder side.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. Iso-
couplers provide voltage isolation in excess of 2.5 kV. The serial
loading structure of the AD5764R makes it ideal for isolated
interfaces because the number of interface lines is kept to a mini-
mum. Figure 44 shows a 4-channel isolated interface to the
AD5764R using an
information on iCoupler products, refer to www.analog.com.
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5764R is accomplished via
a serial bus that uses standard protocol that is compatible with
microcontrollers and DSP processors. The communication
channel is a 3-wire (minimum) interface consisting of a clock
signal, a data signal, and a synchronization signal. The AD5764R
requires a 24-bit data-word with data valid on the falling edge
of SCLK.
For all the interfaces, a DAC output update can be performed
automatically when all the data is clocked in, or it can be done
under the control of LDAC. The contents of the DAC register
can be read using the readback function.
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V
V
V
V
ADuM1400
OA
OB
OC
OD
TO SCLK
TO SDIN
TO SYNC
TO LDAC
iCoupler® product. For more