SC2200UFH-266B D3 AMD (ADVANCED MICRO DEVICES), SC2200UFH-266B D3 Datasheet - Page 102
SC2200UFH-266B D3
Manufacturer Part Number
SC2200UFH-266B D3
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.SC2200UFH-266B_D3.pdf
(429 pages)
Specifications of SC2200UFH-266B D3
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
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5.4.2.4
Serial Ports 1 and 2 are identical, except for their reset val-
ues.
Serial Port 1 is designated as LDN 03h and Serial Port 2 as
LDN 08h. Table 5-11 lists the configuration registers which
108
Index F0h
Index
F0h
30h
60h
61h
70h
71h
74h
75h
Bit
6:3
7
2
1
0
LDN 03h and 08h - Serial Ports 1 and 2
Description
Bank Select Enable. Enables bank switching for Serial Ports 1 and 2.
0: Disabled. (Default)
1: Enabled.
Reserved.
Busy Indicator. (RO) This bit can be used by power management software to decide when to power-down Serial Ports 1
and 2 logical devices.
0: No transfer in progress. (Default)
1: Transfer in progress.
Power Mode Control. When the logical device is active in:
0: Low power mode - Serial Ports 1 and 2 Clock disabled. The output signals are set to their default states. Registers are
1: Normal power mode - Serial Ports 1 and 2 clock enabled. Serial Ports 1 and 2 are functional when the respective logical
TRI-STATE Control. This bit controls the TRI-STATE status of the device output pins when it is inactive (disabled).
0: Disabled. (Default)
1: Enabled when device inactive.
Type
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
maintained. (Unlike Active bit in Index 30h that also prevents access to Serial Ports 1 or 2 registers.)
devices are active. (Default)
32580B
Configuration Register or Action
Activate. See also bit 0 of the SIOCF1 register.
Base Address MSB register. Bits [7:3] (for A[15:11]) are RO, 00000b.
Base Address LSB register. Bit [2:0] (for A[2:0]) are RO, 000b.
Interrupt Number.
Interrupt Type. Bit 1 is R/W; other bits are RO.
Report no DMA assignment.
Report no DMA assignment.
Serial Ports 1 and 2 Configuration register.
Table 5-12. Serial Ports 1 and 2 Configuration Register
Table 5-11. Relevant Serial Ports 1 and 2 Registers
Serial Ports 1 and 2 Configuration Register (R/W)
affect Serial Ports 1 and 2. Only the last register (F0h) is
described here (Table 5-12). See Table 5-3 "Standard Con-
figuration Registers" on page 101 for descriptions of the
others.
AMD Geode™ SC2200 Processor Data Book
Port 1
F8h
00h
03h
04h
03h
04h
04h
02h
Reset Value: 02h
Reset Value
SuperI/O Module
Port 2
F8h
00h
02h
03h
03h
04h
04h
02h
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