STK11C68-P25I Cypress Semiconductor Corp, STK11C68-P25I Datasheet - Page 4

• Manufacturer Part Number: STK11C68-P25I
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK11C68-P25I

• Word Size: 8b
• Organization: 8Kx8
• Density: 64Kb
• Interface Type: Parallel
• Access Time (max): 25ns
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: -40C to 85C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 90mA
• Lead Free Status / Rohs Status: Not Compliant

Document Control #ML0007 Rev 0.3
STK11C68 (SMD5962–92324)
SRAM READ CYCLES #1 & #2
Note f:
Note g: I/O state assumes E, G < V
Note h: Measured ± 200mV from steady state output voltage.
SRAM READ CYCLE #1: Address Controlled
SRAM READ CYCLE #2: E Controlled
DQ (DATA OUT)
DQ (DATA OUT)
NO.
10
11
1
2
3
4
5
6
7
8
9
ADDRESS
ADDRESS
February, 2007
W must be high during SRAM READ cycles and low during SRAM WRITE cycles.
t
t
t
t
t
t
t
t
t
t
t
ELQV
AVAV
AVQV
GLQV
AXQX
ELQX
EHQZ
GLQX
GHQZ
ELICCH
EHICCL
#1, #2
I
CC
G
E
f
g
g
h
h
SYMBOLS
e
d, e
t
t
t
t
t
t
t
t
t
t
t
ACS
RC
AA
OE
OH
LZ
HZ
OLZ
OHZ
PA
PS
Alt.
IL
and W > V
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold after Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
STANDBY
t
ELICCH
t
t
IH
10
ELQX
AXQX
t
PARAMETER
6
; device is continuously selected.
5
GLQX
8
t
GLQV
4
t
AVAV
f
2
t
ACTIVE
t
ELQV
AVQV
1
3
t
4
AVAV
2
STK11C68-25
f, g
MIN
25
5
5
0
0
MAX
25
25
10
10
10
25
DATA VALID
STK11C68-35
MIN
35
5
5
0
0
MAX
35
35
15
13
13
35
DATA VALID
STK11C68-45
MIN
45
5
5
0
0
(V
t
GHQZ
9
MAX
t
CC
EHQZ
45
45
20
15
15
45
7
t
EHICCL
= 5.0V + 10%)
11
STK11C68-55
MIN
55
5
5
0
0
MAX
55
55
25
25
25
55
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns