AD9116BCPZ Analog Devices Inc, AD9116BCPZ Datasheet - Page 16

• Manufacturer Part Number: AD9116BCPZ
• Description: IC DAC DUAL 12BIT LO PWR 40LFCSP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9116BCPZ

• Data Interface: Serial
• Number Of Bits: 12
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 232mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-LFCSP
• Resolution (bits): 12bit
• Sampling Rate: 125MSPS
• Input Channel Type: Serial
• Supply Current: 55mA
• Digital Ic Case Style: CSP
• No. Of Pins: 40
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9114/AD9115/AD9116/AD9117
Table 10. AD9117 Pin Function Descriptions
Pin No.
1 to 4
5
6
7
8 to 14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Mnemonic
DB[11:8]
DVDDIO
DVSS
DVDD
DB[7:1]
DB0 (LSB)
DCLKIO
CVDD
CLKIN
CVSS
CMLQ
RLQN
QOUTN
QOUTP
RLQP
AVSS
AVDD
RLIP
IOUTP
IOUTN
RLIN
Description
Digital Inputs.
Digital I/O Supply Voltage Input (1.8 V to 3.3 V Nominal).
Digital Common.
Digital Core Supply Voltage Output (1.8 V). Strap DVDD to DVDDIO at 1.8 V. If DVDDIO > 1.8 V, bypass DVDD
with a 1.0 μF capacitor; however, do not otherwise connect it. The LDO should not drive external loads.
Digital Inputs.
Digital Input (LSB).
Data Input/Output Clock. Clock used to qualify input data.
Sampling Clock Supply Voltage Input (1.8 V to 3.3 V). CVDD must be ≥ DVDD.
LVCMOS Sampling Clock Input.
Sampling Clock Supply Voltage Common.
Q DAC Output Common-Mode Level. When the internal on-chip (QR
the on-chip QR
disabled, this pin is the common-mode load for Q DAC and must be connected to AVSS through a resistor,
see the Using the Internal Termination Resistors section. Recommended value for this external resistor is 0 Ω.
Load Resistor (62.5 Ω) to the CMLQ Pin. For the internal load resistor to be used, this pin should be tied to
QOUTN externally.
Complementary Q DAC Current Output. Full-scale current is sourced when all data bits are 0s.
Q DAC Current Output. Full-scale current is sourced when all data bits are 1s.
Load Resistor (62.5 Ω) to the CMLQ Pin. For the internal load resistor to be used, this pin should be tied to
QOUTP externally.
Analog Common.
Analog Supply Voltage Input (1.8 V to 3.3 V).
Load Resistor (62.5 Ω) to the CMLI Pin. For the internal load resistor to be used, this pin should be tied to
IOUTP externally.
I DAC Current Output. Full-scale current is sourced when all data bits are 1s.
Complementary I DAC Current Output. Full-scale current is sourced when all data bits are 0s.
Load Resistor (62.5 Ω) to the CMLI Pin. For the internal load resistor to be used, this pin should be tied to
IOUTN externally.
CML
resistor. It is recommended to leave this pin unconnected. When the internal on-chip (QR
DVDDIO
NOTES
1. THE EXPOSED PAD IS CONNECTED TO AVSS AND
DVDD
DVSS
MUST BE SOLDERED TO THE GROUND PLANE.
EXPOSED METAL AT PACKAGE CORNERS IS
CONNECTED TO THIS PAD.
DB11
DB10
DB8
DB7
DB6
DB5
DB9
10
Figure 5. AD9117 Pin Configuration
1
2
4
5
6
7
8
9
3
Rev. A | Page 16 of 80
PIN 1
INDICATOR
(Not to Scale)
AD9117
TOP VIEW
30 RLIN
29 IOUTN
28 IOUTP
27 RLIP
26 AVDD
25 AVSS
24 RLQP
23 QOUTP
22 QOUTN
21 RLQN
CML
) is enabled, this pin is connected to
CML
) is