AD9762AR Analog Devices Inc, AD9762AR Datasheet - Page 8

• Manufacturer Part Number: AD9762AR
• Description: IC DAC 12BIT 125MSPS 28-SOIC
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9762AR

• Rohs Status: RoHS non-compliant
• Settling Time: 35ns
• Number Of Bits: 12
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 160mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Package: 28SOIC W
• Resolution: 12 Bit
• Conversion Rate: 125 MSPS
• Architecture: Segment
• Digital Interface Type: Parallel
• Number Of Outputs Per Chip: 1
• Output Type: Current
• Full Scale Error: 10 %FSR
• Integral Nonlinearity Error: ±4 LSB
• Maximum Settling Time: 0.035(Typ) us
• Number Of Channels: 1
• Interface Type: Parallel
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Requirement: Analog and Digital
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: SOIC W
• For Use With: AD9762-EB - BOARD EVAL FOR AD9762
• Lead Free Status / Rohs Status: Not Compliant

AD9762
–100
–0.25
–0.50
–0.75
–1.00
–1.25
–70
–75
–80
–85
–90
–95
1.25
1.00
0.75
0.50
0.25
Figure 18. Single-Tone SFDR
0
Figure 12. THD vs. f
f
0
OUT
0
START: 0.3 MHz
0
Figure 15. Typical INL
20
= 2 MHz
2ND
HARMONIC
1000
FREQUENCY – MSPS
40
4TH
HARMONIC
60
CODE
f
f
SFDR = 72dBc
AMPLITUDE = 0dBFS
2000
CLOCK
OUT
HARMONIC
80
= 2.41MHz
= 100 MSPS
STOP: 50.0 MHz
CLOCK
100
3RD
3000
120
@
4000
140
Figure 13. SFDR vs. f
@ 100 MSPS, 0 dBFS
–100
–0.2
–0.4
0.8
0.6
0.4
0.2
80
75
70
65
60
55
50
45
40
35
30
0
1
0
Figure 19. Dual-Tone SFDR
2
START: 0.3 MHz
0
Figure 16. Typical DNL
4
1000
6
8
I
OUTFS
–8–
10
CODE
2000
f
f
f
SFDR = 62dBc
AMPLITUDE = 0dBFS
CLOCK
OUT1
OUT2
– mA
12
OUT
2.5MHz
= 13.5MHz
= 14.5MHz
= 100 MSPS
22.2MHz
40MHz
STOP: 50.0 MHz
10MHz
14
3000
and I
16
18
OUTFS
4000
20
Figure 14. Differential vs. Single-
Ended SFDR vs. f
Figure 17. SFDR vs. Temperature
@ 100 MSPS, 0 dBFS
–110
–10
75
70
65
60
55
50
45
80
75
70
65
60
55
50
1
Figure 20. Four-Tone SFDR
–40
START: 0.3 MHz
IOUTA @ 0dBFS
IOUTA @ –6dBFS
10MHz
–20
OUTPUT FREQUENCY – MHz
2.5MHz
40MHz
TEMPERATURE – C
0
IDIFF @ 0dBFS
20
f
f
f
f
f
SFDR = 71dBc
AMPLITUDE = 0dBFS
10
OUT
CLOCK
OUT1
OUT2
OUT3
OUT4
IDIFF @ –6dBFS
@ 100 MSPS
= 6.25MHz
= 6.75MHz
= 7.25MHz
= 7.75MHz
40
= 50 MSPS
STOP: 25.0 MHz
60
REV. B
80
100