AD7545AKR Analog Devices Inc, AD7545AKR Datasheet - Page 4

• Manufacturer Part Number: AD7545AKR
• Description: IC DAC 12BIT W/BUFF MULT 20-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7545AKR

• Rohs Status: RoHS non-compliant
• Settling Time: 2µs
• Number Of Bits: 12
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Power Dissipation (max): -

AD7545
CIRCUIT INFORMATION—D/A CONVERTER SECTION
Figure 1 shows a simplified circuit of the D/A converter section
of the AD7545 and Figure 2 gives an approximate equivalent
circuit. Note that the ladder termination resistor is connected to
AGND. R is typically 11 kΩ.
The binary weighted currents are switched between the OUT1
bus line and AGND by N-channel switches, thus maintaining a
constant current in each ladder leg independent of the switch
state.
The capacitance at the OUT1 bus line, C
dent and varies from 70 pF (all switches to AGND) to 200 pF
(all switches to OUT1).
One of the current switches is shown in Figure 2. The input
resistance at V
the R/2R ladder characteristic resistance and is equal to value
“R”). Since R
nal can be driven by a reference voltage or a reference current,
ac or dc, of positive or negative polarity. (If a current source is
used, a low temperature coefficient external R
to define scale factor.)
CIRCUIT INFORMATION—DIGITAL SECTION
Figure 3 shows the digital structure for one bit.
The digital signals CONTROL and CONTROL are generated
from CS and WR.
The input buffers are simple CMOS inverters designed so that
when the AD7545 is operated with V
vert TTL input levels (2.4 V and 0.8 V) into CMOS logic levels.
When V
buffers operate in their linear region and draw current from the
V
IN
V
INPUT BUFFERS
REF
Figure 2. N-Channel Current Steering Switch
IN
Figure 1. Simplified D/A Circuit of AD7545
(MSB)
DB11
is in the region of 2.0 volts to 3.5 volts, the input
2R
IN
INTERFACE
R
Figure 3. Digital Input Structure
REF
DB10
at the V
LOGIC
CONTROL
FROM
(Figure 1) is always equal to R
2R
R
DB9
REF
2R
R
pin is constant, the reference termi-
AGND
CONTROL
TO LADDER
DB1
2R
DD
R
OUT 1
= 5 V, the buffers con-
(LSB)
DB0
OUT1
2R
FB
, is code depen-
is recommended
LDR
TO AGND SWITCH
TO OUT1 SWITCH
2R
(R
OUT 1
AGND
LDR
R
FB
is
–4–
power supply. To minimize power supply currents it is recom-
mended that the digital input voltages be as close as practicably
possible to the supply rails (V
The AD7545 may be operated with any supply voltage in the
range 5 ≤ V
levels are CMOS compatible only, i.e., 1.5 V and 13.5 V.
BASIC APPLICATIONS
Figures 4 and 5 show simple unipolar and bipolar circuits using
the AD7545. Resistor R1 is used to trim for full scale. The
“G” versions (AD7545GLN, AD7545GCQ, AD7545GUD)
have a guaranteed maximum gain error of ± 1 LSB at +25°C
(V
dispense with gain trim resistors altogether. Capacitor C1 provides
phase compensation and helps prevent overshoot and ringing when
using high speed op amps. Note that all the circuits of Figures 4, 5
and 6 have constant input impedance at the V
The circuit of Figure 1 can either be used as a fixed reference
D/A converter so that it provides an analog output voltage in the
range 0 to –V
or V
an attenuator (2-Quadrant Multiplier). V
in the range –20 ≤ V
handle such voltages) since V
Table II shows the code relationship for the circuit of Figure 4.
Table I. Recommended Trim Resistor Values vs. Grades for
V
Trim
Resistor
R1
R2
Binary Number in DAC Register Analog Output
1 1 1 1
1 0 0 0
0 0 0 0
0 0 0 0
Table II. Unipolar Binary Code Table for Circuit of Figure 4
DD
DD
V
IN
IN
= +5 V
= +5 V), and in many applications it should be possible to
can be an ac signal in which case the circuit behaves as
R1
1 1 1 1
0 0 0 0
0 0 0 0
0 0 0 0
DD
*
Figure 4. Unipolar Binary Operation
J/A/S
500 Ω
150 Ω
IN
≤ 15 volts. With V
19
(note the inversion introduced by the op amp),
V
REF
DB11–DB0
IN
V
V
18
DD
DD
+ 20 volts (provided the op amp can
1 1 1 1
0 0 0 0
0 0 0 1
0 0 0 0
AD7545
K/B/T
200 Ω
68 Ω
DGND
R
REF
20
DD
FB
and DGND).
DD
AGND
is permitted to exceed V
OUT1
3
R2
= +15 V the input logic
*
REFER TO TABLE I
*
–V
–V
–V
0 Volts
1
2
L/C/U
100 Ω
33 Ω
COMMON
ANALOG
IN
IN
IN
IN
can be any voltage









REF
C1
33pF
4095
4096
2048
4096
4096
1
terminal.
AD544L
(SEE TEXT)




 = –1/2 V




GL/GC/GU
20 Ω
6.8 Ω
REV. A
DD
V
OUT
.
IN