AD9760ARU Analog Devices Inc, AD9760ARU Datasheet - Page 12

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AD9760ARU

Manufacturer Part Number
AD9760ARU
Description
IC DAC 10BIT 125MSPS 28-TSSOP
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9760ARU

Settling Time
35ns
Rohs Status
RoHS non-compliant
Number Of Bits
10
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
175mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Number Of Channels
1
Resolution
10b
Interface Type
Parallel
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Power Supply Requirement
Analog and Digital
Output Type
Current
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
For Use With
AD9760-EBZ - BOARD EVAL FOR AD9760
Data Interface
-
Lead Free Status / RoHS Status
Not Compliant

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AD9760
The differential voltage, V
I
Substituting the values of I
expressed as:
These last two equations highlight some of the advantages of
operating the AD9760 differentially. First, the differential op-
eration will help cancel common-mode error sources associated
with I
Second, the differential code dependent current and subsequent
voltage, V
output (i.e., V
power to the load.
Note, the gain drift temperature performance for a single-ended
(V
can be enhanced by selecting temperature tracking resistors for
R
in Equation 8.
REFERENCE OPERATION
The AD9760 contains an internal 1.20 V bandgap reference
that can be easily disabled and overridden by an external refer-
ence. REFIO serves as either an input or output depending on
whether the internal or an external reference is selected. If
REFLO is tied to ACOM, as shown in Figure 40, the internal
reference is activated and REFIO provides a 1.20 V output. In
this case, the internal reference must be compensated externally
with a ceramic chip capacitor of 0.1 µF or greater from REFIO
to REFLO. Also, REFIO should be buffered with an external
amplifier having an input bias current less than 100 nA if any
additional loading is required.
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external reference may be applied to
REFIO as shown in Figure 41. The external reference may
provide either a fixed reference voltage to enhance accuracy and
drift performance or a varying reference voltage for gain control.
Note that the 0.1 µF compensation capacitor is not required
since the internal reference is disabled, and the high input im-
pedance (i.e., 1 MΩ) of REFIO minimizes any loading of the
external reference.
OUTB
ADDITIONAL
LOAD
OUTA
V
V
(32 R
OUTA
DIFF
DIFF
LOAD
is:
and R
and V
Figure 40. Internal Reference Configuration
LOAD
DIFF
= (I
= {(2 DAC CODE – 1023)/1024} ×
and I
SET
REF BUFFER
OUTB
EXTERNAL
OPTIONAL
OUTA
OUTA
, is twice the value of the single-ended voltage
/R
OUTB
due to their ratiometric relationship as shown
SET
) or differential output (V
– I
or V
) × V
0.1 F
such as noise, distortion and dc offsets.
2k
OUTB
OUTB
REFIO
DIFF
) × R
OUTA
), thus providing twice the signal
REFIO
FS ADJ
, appearing across I
+1.2V REF
AD9760
, I
LOAD
OUTB
REFLO
and I
DIFF
REF
50pF
) of the AD9760
; V
COMP1
OUTA
DIFF
0.1 F
CURRENT
SOURCE
ARRAY
and
+5V
can be
AVDD
(7)
(8)
–12–
REFERENCE CONTROL AMPLIFIER
The AD9760 also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
The control amplifier is configured as a V-I converter as shown
in Figure 41, so that its current output, I
the ratio of the V
in Equation 4. I
sources with the proper scaling factor to set I
Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
I
62.5 µA and 625 µA. The wide adjustment span of I
vides several application benefits. The first benefit relates
directly to the power dissipation of the AD9760, which is
proportional to I
The second benefit relates to the 20 dB adjustment, which is
useful for system gain control purposes.
The small signal bandwidth of the reference control amplifier is
approximately 1.4 MHz and can be reduced by connecting an
external capacitor between COMP1 and AVDD. The output of
the control amplifier, COMP1, is internally compensated via a
50 pF capacitor that limits the control amplifier small-signal
bandwidth and reduces its output impedance. Any additional
external capacitance further limits the bandwidth and acts as a
filter to reduce the noise contribution from the reference ampli-
fier. Figure 42 shows the relationship between the external
capacitor and the small signal –3 dB bandwidth of the refer-
ence amplifier. Since the –3 dB bandwidth corresponds to the
dominant pole, and hence the time constant, the settling time of
the control amplifier to a stepped reference input response can
be approximated.
Figure 42. External COMP1 Capacitor vs. –3 dB Bandwidth
OUTFS
EXTERNAL
AVDD
REF
over a 2 mA to 20 mA range by setting IREF between
1000
Figure 41. External Reference Configuration
0.1
10
0.1
R
SET
REF
OUTFS
REFIO
V
I
V
REFIO
REF
REFIO
is copied over to the segmented current
=
1
and an external resistor, R
/R
(refer to the Power Dissipation section).
SET
COMP1 CAPACITOR – nF
REFIO
FS ADJ
+1.2V REF
AD9760
10
REFLO
REF
100
50pF
, is determined by
OUTFS
REFERENCE
CONTROL
AMPLIFIER
COMP1
SET
0.1 F
as stated in
CURRENT
SOURCE
OUTFS
, as stated
ARRAY
AVDD
1000
OUTFS
AVDD
REV. B
pro-
.

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