DAC8512FP Analog Devices Inc, DAC8512FP Datasheet - Page 12

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DAC8512FP

Manufacturer Part Number
DAC8512FP
Description
IC DAC 12BIT 5V COMPLETE 8-DIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of DAC8512FP

Mounting Type
Through Hole
Rohs Status
RoHS non-compliant
Settling Time
16µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
2.5mW
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Resolution (bits)
12bit
No. Of Pins
8
Peak Reflow Compatible (260 C)
No
Update Rate
0.0625MSPS
No. Of Bits
12 Bit
Leaded Process Compatible
No
Interface Type
Serial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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DAC8512
A Single-Supply, Programmable Current Source
The circuit in Figure 32 shows how the DAC8512 can be used
with an OP295 single-supply, rail-to-rail output op amp to pro-
vide a digitally programmable current sink from V
consumes less than 3.8 mA, maximum. The DAC’s output volt-
age is applied across R1 by placing the 2N2222 transistor in the
Figure 31. A High-Compliance, Digitally Controlled
Precision Current Source
100k
0.1 F
R1
REF02
+15V
4
2
17
18
2
1
SCLK
CLR
SDI
4
CS
LD
6
100k
AMP05
P1
7
HDAC/LDAC
5k
R2
–15V
2
6
5
3
4
5
74HC05
SCLK
11
DAC8512FZ
6
CLR
SDI
LD
0.1 F
1/6
9
+15V
12
1
7
2
+5V
1
0.1 F
1k
8
Figure 33. A Digitally Programmable Window Detector
0.1 F
10
8
R
100
CS
4
4
6
2
5
3
6
2
5
3
R3
3k
0mA
2.4 A/ BIT
DAC8512
DAC8512
7
7
SOURCE
R4
1k
I
+5V
+5V
OUT
1
1
that
8
8
10mA
0.1 F
0.1 F
–12–
V
IN
C1, C2 = 1/4 CMP-404
OP295’s feedback loop. For the circuit values shown, the full-
scale output current is 1 mA which is given by the following
equation:
where DW = DAC8512’s binary digital input code.
The usable output voltage range of the current sink is +5 V to
+60 V. The low limit of the range is controlled by transistor
saturation, and the high limit is controlled by the collector-base
breakdown voltage of the 2N2222.
A Digitally Programmable Window Detector
A digitally programmable, upper/lower limit detector using two
DAC8512s is shown in Figure 33. The required upper and
lower limits for the test are loaded into each DAC individually
by controlling HDAC/LDAC. If a signal at the test input is not
within the programmed limits, the output will indicate a logic
zero which will turn the red LED on.
4
5
7
6
SCLK
Figure 32. A Single-Supply, Programmable Current
Source
CLR
I
SDI
CS
LD
C1
C2
OUT
+5V
12
3
=
0.1 F
2
6
5
3
4
DW 4.095V
2
1
DAC8512FP
R1
+5V
+5V
1
7
RED LED
PASS/FAIL
R1
604
3
T1
74HC05
1/6
0.1 F
8
4
+5V
A1 = 1/2 OP295
R2
604
3
2
GREEN LED
T1
+5V
A1
1
V
S
2N2222
LOAD
R1
4.02k
P1
200
FULL-SCALE
ADJUST
REV. A

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