AD7948BR Analog Devices Inc, AD7948BR Datasheet - Page 8

• Manufacturer Part Number: AD7948BR
• Description: IC DAC 12BIT MULTIPLYING 20-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7948BR

• Rohs Status: RoHS non-compliant
• Settling Time: 600ns
• Number Of Bits: 12
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 25µW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)

AD7943/AD7945/AD7948
TERMINOLOGY
Relative Accuracy
Relative Accuracy or endpoint linearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for zero error and full-scale error and is normally
expressed in Least Significant Bits or as a percentage of full-
scale reading.
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of 1 LSB maximum
ensures monotonicity.
Gain Error
Gain Error is a measure of the output error between an ideal
DAC and the actual device output. It is measured with all 1s
in the DAC after offset error has been adjusted out and is ex-
pressed in Least Significant Bits. Gain error is adjustable to
zero with an external potentiometer.
Output Leakage Current
Output leakage current is current which flows in the DAC lad-
der switches when these are turned off. For the I
it can be measured by loading all 0s to the DAC and measuring
the I
when the DAC is loaded with all 1s.
OUT1
AGND
I
STB2
I
STB1
OUT2
OUT1
SRO
LD1
SRI
current. Minimum current will flow in the I
1
2
3
4
5
6
7
8
DIP/SOP
(Not to Scale)
TOP VIEW
AD7943
16
15
14
13
12
11
10
9
R
V
V
CLR
DGND
STB4
STB3
LD2
REF
DD
FB
AGND
STB2
I
I
STB1
OUT1
OUT2
SRO
LD1
SRI
NC
NC
10
NC = NO CONNECT
1
2
3
4
5
6
7
8
9
(Not to Scale)
TOP VIEW
SSOP
AD7943
OUT1
PIN CONFIGURATIONS
OUT2
terminal,
20
19
18
17
16
15
14
13
12
11
R
V
V
CLR
NC
NC
DGND
STB4
STB3
LD2
line
FB
REF
DD
–8–
Output Capacitance
This is the capacitance from the I
Output Voltage Settling Time
This is the amount of time it takes for the output to settle to a
specified level for a full-scale input change. For these devices, it
is specified both with the AD843 as the output op amp in the
normal current mode and with the AD820 in the biased current
mode.
Digital to Analog Glitch Impulse
This is the amount of charge injected into the analog output
when the inputs change state. It is specified as the area of the
glitch in nV-s. It is measured with the reference input connected
to AGND and the digital inputs toggled between all 1s and all
0s. As with Settling Time, it is specified with both the AD817
and the AD820.
AC Feedthrough Error
This is the error due to capacitive feedthrough from the DAC
reference input to the DAC I
loaded in the DAC.
Digital Feedthrough
When the device is not selected, high frequency logic activity on
the device digital inputs is capacitively coupled through the
device to show up as noise on the I
the op amp output. This noise is digital feedthrough.
AGND
DGND
DB10
I
DB11
OUT1
DB9
DB6
DB8
DB7
DB5
DIP/SOP/SSOP
10
1
2
3
4
5
6
7
8
9
(Not to Scale)
TOP VIEW
AD7945
20
19
18
17
16
15
14
13
12
11
DB0
DB1
DB2
DB3
DB4
R
V
V
WR
CS
REF
DD
FB
DB7 (MSB)
OUT1
DF/DOR
CSMSB
AGND
DGND
CTRL
I
OUT1
DB6
DB5
DB4
OUT1
terminal, when all 0s are
DIP/SOP/SSOP
OUT1
10
1
2
3
4
5
6
7
8
9
pin to AGND.
(Not to Scale)
pin and subsequently on
TOP VIEW
AD7948
20
19
18
17
16
15
14
13
12
11
R
V
V
WR
CSLSB
DB1
DB2
DB3
LDAC
DB0 (LSB)
REF
DD
FB
REV. B