MAX5190BEEG+ Maxim Integrated Products, MAX5190BEEG+ Datasheet - Page 13

IC DAC 8BIT 40MHZ VOUT 24-QSOP

MAX5190BEEG+

Manufacturer Part Number
MAX5190BEEG+
Description
IC DAC 8BIT 40MHZ VOUT 24-QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5190BEEG+

Settling Time
25µs
Number Of Bits
8
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-QSOP
Number Of Dac Outputs
1
Resolution
8 bit
Interface Type
Parallel
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Power Dissipation
762 mW
Minimum Operating Temperature
- 40 C
Supply Current
4.2 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Figure 7. Using the MAX5187/MAX5190 for I/Q Signal Reconstruction
In a typical QAM application (Figure 7), the modulation
occurs in the digital domain, and two DACs such as the
MAX5187/MAX5190 may be used to reconstruct the
analog I and Q components.
The I/Q reconstruction system is completed by a quad-
rature modulator that combines the reconstructed com-
ponents with in-phase and quadrature carrier
frequencies and then sums both outputs to provide the
QAM signal.
Designing a traditional AWG requires five major func-
tional blocks (Figure 8a): clock generator, counter,
waveform memory, digital-to-analog converter for
waveform reconstruction, and output filter. The wave-
form memory contains a sequentially stored digital
replica of the desired analog waveforms. This memory
shares a common clock with the DAC.
For each clock cycle, a counter adds one count to the
address for the waveform memory. The memory then
loads the next value to the DAC, which generates an
analog output voltage corresponding to that data value
until the next clock cycle. A DAC output filter can either
be a simple or complex lowpass filter, depending on
the AWG requirements for waveform function and fre-
quencies. The main limitations of the AWG’s flexibility
8-Bit, 40MHz, Current/Voltage-Output DACs
Using the MAX5187/MAX5190 for
Arbitrary Waveform Generation
PROCESSOR
______________________________________________________________________________________
DIGITAL
SIGNAL
+3V
8
8
AV
AV
MAX5187
MAX5190
MAX5187
MAX5190
DD
DD
DV
DV
DD
DD
Q COMPONENT
I COMPONENT
are DAC resolution and dynamic performance, memory
length, clock/playback frequency, and filter character-
istics.
Although the MAX5187/MAX5190 offer high-frequency
operation and excellent dynamics, they are suitable for
relaxed requirements in resolution (8-bit AWGs). To
increase an AWG’s high-frequency accuracy, tempera-
ture stability, wideband tuning, and past phase continu-
ous-frequency switching, the user may approach a
direct digital synthesis (DDS) AWG (Figure 8b). This
DDS loop supports standard waveforms that are repeti-
tive, such as sine, square, TTL, and triangular wave-
forms. DDS allows for precise control of the data
stream input to the DAC. Data for one complete output
waveform cycle is sequentially stored in RAM. As the
RAM addresses change, the DAC converts the incom-
ing data bits into a corresponding voltage waveform.
The resulting output signal frequency is proportional to
the frequency rate at which the RAM addresses are
changed.
Grounding and power-supply decoupling strongly influ-
ence the MAX5187/MAX5190’s performance. Unwanted
digital crosstalk may couple through the input, reference,
power-supply, and ground connections, which may
affect dynamic specifications like signal-to-noise ratio or
spurious-free dynamic range. In addition, electromagnet-
Grounding and Power-Supply Decoupling
FREQUENCY
FILTER
FILTER
CARRIER
BP
BP
QUADRATURE
MODULATOR
90°
+3V
MAX2452
Σ
IF
13

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