AD9785BSVZ Analog Devices Inc, AD9785BSVZ Datasheet - Page 9

• Manufacturer Part Number: AD9785BSVZ
• Description: IC DAC 12BIT 800MSPS 100TQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9785BSVZ

• Data Interface: Serial
• Number Of Bits: 12
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 450mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Resolution (bits): 12bit
• Sampling Rate: 800MSPS
• Input Channel Type: Parallel
• Digital Ic Case Style: QFP
• No. Of Pins: 100
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 7. AD9787 Pin Function Descriptions
Pin No.
1, 2, 9, 10
3, 4, 7, 8, 11
5
6
12, 72, 77, 79, 81, 82, 85,
88, 91, 94, 95, 97, 99
13
14
15, 22, 32, 44, 54, 64
16, 23, 33, 43, 53, 60
17
18
19
20
21
24
25
26
27
28
29
30
NC = NO CONNECT
REFCLK+
REFCLK–
SYNC_I+
SYNC_I–
CVDD18
CVDD18
CVDD18
CVDD18
DVDD18
DVDD18
P1D[13]
P1D[12]
P1D[11]
P1D[10]
P1D[9]
P1D[8]
P1D[7]
CGND
CGND
CGND
CGND
CGND
AGND
DGND
DGND
Mnemonic
CVDD18
CGND
REFCLK+
REFCLK−
AGND
SYNC_I+
SYNC_I−
DGND
DVDD18
P1D[13]
P1D[12]
P1D[11]
P1D[10]
P1D[9]
P1D[8]
P1D[7]
P1D[6]
P1D[5]
P1D[4]
P1D[3]
P1D[2]
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
PIN 1 INDICATOR
Description
1.8 V Clock Supply.
Clock Common.
Differential Clock Input, Positive.
Differential Clock Input, Negative.
Analog Common.
Differential Synchronization Input, Positive.
Differential Synchronization Input, Negative.
Digital Common.
1.8 V Digital Supply.
Port 1, Data Input D13 (MSB).
Port 1, Data Input D12.
Port 1, Data Input D11.
Port 1, Data Input D10.
Port 1, Data Input D9.
Port 1, Data Input D8.
Port 1, Data Input D7.
Port 1, Data Input D6.
Port 1, Data Input D5.
Port 1, Data Input D4.
Port 1, Data Input D3.
Port 1, Data Input D2.
Figure 3. AD9787 Pin Configuration
Rev. A | Page 9 of 64
(Not to Scale)
AD9787
TOP VIEW
ANALOG DOMAIN
DIGITAL DOMAIN
AD9785/AD9787/AD9788
75
73
67
74
72
71
70
69
68
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
I120
VREF
IPTAT
AGND
IRQ
RESET
SPI_CSB
SCLK
SPI_SDIO
SPI_SDO
PLL_LOCK
DGND
SYNC_O+
SYNC_O–
DVDD33
DVDD18
NC
NC
P2D[0]
P2D[1]
P2D[2]
DGND
DVDD18
P2D[3]
P2D[4]