MAX530BCAG+ Maxim Integrated Products, MAX530BCAG+ Datasheet - Page 10

• Manufacturer Part Number: MAX530BCAG+
• Description: IC DAC 12BIT PAR/VOLT I/O 24SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX530BCAG+

• Settling Time: 25µs
• Number Of Bits: 12
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Number Of Dac Outputs: 1
• Resolution: 12 bit
• Interface Type: Parallel
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 640 mW
• Minimum Operating Temperature: 0 C
• Supply Current: 250 uA
• Voltage Reference: Internal
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

+5V, Low-Power, Parallel-Input,
Voltage-Output, 12-Bit DAC
Figure 3. Low-Current Shutdown Mode
An additional 110µA of supply current can be saved
when the internal reference is not used by connecting
REFGND to V
such as the 2N7002, can be used to turn off the internal
reference to create a shutdown mode with minimum
current drain (Figure 3). When CLR is high, the transis-
tor pulls REFGND to AGND and the reference and DAC
operate normally. When CLR goes low, REFGND is
pulled up to V
same time, CLR resets the DAC register to all 0s, and
the op-amp output goes to 0V for unity-gain and G = 2
Table 2. Input Latch Addressing
10
CLR CS WR LDAC
H
H
H
H
H
H
H
H
L
______________________________________________________________________________________
X
H
X
H
L
L
L
L
L
H
H
X
X
L
L
L
L
L
DD
DD
CLR
. A low on resistance N-channel FET,
and the reference is shut down. At the
2N7002
H
H
H
H
H
X
L
X
L
33 F
A0
X
X
X
H
H
X
H
L
L
LDAC
A1
REFGND
WR
H
H
H
X
X
X
L
X
L
CS
A0
A1
AGND
DGND
Reset DAC Latches
No Operation
No Operation
NBH (D8-D11)
NBM (D4-D7)
NBL (D0-D3)
Update DAC Only
DAC NOT UPDATED
NBH and Update DAC
DATA UPDATED
POWER-ON
CONTROL
RESET
LOGIC
REFERENCE
2.048V
D0/D8
REFOUT
MAX530
D1/D9
LATCH
INPUT
NBL
D2/D10
D3/D11
modes. This reduces the total single-supply operating
current from 250µA (400µA max) to typically 40µA in
shutdown mode.
A small error voltage is added to the reference output
by the reference current flowing through the N-channel
pull-down transistor. The switch’s on resistance should
be less than 5Ω. A typical reference current of 100µA
would add 0.5mV to REFOUT. Since the reference cur-
rent and on resistance increase with temperature, the
overall temperature coefficient will degrade slightly.
As data is loaded into the DAC and the output moves
above GND, the op-amp quiescent current increases to
its nominal value and the total operating current aver-
ages 250µA. Using dual supplies (±5V), the op amp is
fully biased continuously, and the V
more constant at 250µA. The V
150µA.
The MAX530 logic inputs are compatible with TTL and
CMOS logic levels. However, to achieve the lowest
power dissipation, drive the digital inputs with rail-to-rail
CMOS logic. With TTL logic levels, the power require-
ment increases by a factor of approximately 2.
12-BIT DAC LATCH
D4
REFIN
DAC
LATCH
INPUT
D5
NBM
D6
D7
ROFS
LATCH
INPUT
NBH
RFB
V
V
DD
SS
+5V
V
OUT
SS
DD
current is typically
supply current is