AD9744ACPZ Analog Devices Inc, AD9744ACPZ Datasheet - Page 14

IC DAC 14BIT 210MSPS 32-LFCSP

AD9744ACPZ

Manufacturer Part Number
AD9744ACPZ
Description
IC DAC 14BIT 210MSPS 32-LFCSP
Manufacturer
Analog Devices Inc
Series
TxDAC®r
Datasheet

Specifications of AD9744ACPZ

Data Interface
Parallel
Settling Time
11ns
Number Of Bits
14
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
145mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-LFCSP
Resolution (bits)
14bit
Sampling Rate
210MSPS
Input Channel Type
Parallel
Supply Voltage Range - Analog
2.7V To 3.6V
Supply Voltage Range - Digital
2.7V To 3.6V
Number Of Channels
1
Resolution
14b
Interface Type
Parallel
Single Supply Voltage (typ)
3.3V
Dual Supply Voltage (typ)
Not RequiredV
Power Supply Requirement
Analog and Digital
Output Type
Current
Integral Nonlinearity Error
±5LSB
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
3.6V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
LFCSP EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9744ACP-PCBZ - BOARD EVAL FOR AD9744ACP
Lead Free Status / Rohs Status
Compliant

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AD9744
The control amplifier allows a wide (10:1) adjustment span of
I
62.5 µA and 625 µA. The wide adjustment span of I
vides several benefits. The first relates directly to the power
dissipation of the AD9744, which is proportional to I
(refer to the Power Dissipation section). The second relates to
the 20 dB adjustment, which is useful for system gain control
purposes.
The small signal bandwidth of the reference control amplifier is
approximately 500 kHz and can be used for low frequency small
signal multiplying applications.
DAC TRANSFER FUNCTION
Both DACs in the AD9744 provide complementary current
outputs, IOUTA and IOUTB. IOUTA provides a near full-scale
current output, I
CODE = 16383), while IOUTB, the complementary output,
provides no current. The current output appearing at IOUTA
and IOUTB is a function of both the input code and I
can be expressed as
where DAC CODE = 0 to 16383 (that is, decimal representation).
As mentioned previously, I
current I
V
where
The two current outputs will typically drive a resistive load di-
rectly or via a transformer. If dc coupling is required, IOUTA
and IOUTB should be directly connected to matching resistive
loads, R
R
IOUTA or IOUTB as would be the case in a doubly terminated
50 Ω or 75 Ω cable. The single-ended voltage output appearing
at the IOUTA and IOUTB nodes is simply
Note that the full-scale value of V
exceed the specified output compliance range to maintain speci-
fied distortion and linearity performance.
OUTFS
LOAD
REFIO
V
V
V
IOUTA
IOUTB
I
I
, and external resistor, R
over a 2 mA to 20 mA range by setting I
may represent the equivalent load resistance seen by
OUTFS
REF
OUTA
OUTB
DIFF
LOAD
REF
=
=
, which is nominally set by a reference voltage,
V
=
=
= 32
, that are tied to analog common, ACOM. Note that
(
=
=
REFIO
IOUTA
IOUTB
IOUTA
(
(
16383
DAC
×
OUTFS
I
/
REF
R
SET
, when all bits are high (that is, DAC
×
×
CODE
R
R
IOUTB
DAC
LOAD
LOAD
OUTFS
/
16384
CODE
SET
)
is a function of the reference
×
. It can be expressed as
OUTA
R
LOAD
)
)
×
/16384
and V
I
OUTFS
×
OUTB
REF
I
OUTFS
should not
between
OUTFS
OUTFS
OUTFS
pro-
and
Rev. B | Page 14 of 32
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Substituting the values of IOUTA, IOUTB, I
expressed as
Equation 7 and Equation 8 highlight some of the advantages
of operating the AD9744 differentially. First, the differential
operation helps cancel common-mode error sources associated
with IOUTA and IOUTB, such as noise, distortion, and dc
offsets. Second, the differential code dependent current and
subsequent voltage, V
voltage output (that is, V
signal power to the load.
Note that the gain drift temperature performance for a single-
ended (V
AD9744 can be enhanced by selecting temperature tracking
resistors for R
as shown in Equation 8.
ANALOG OUTPUTS
The complementary current outputs in each DAC, IOUTA,
and IOUTB may be configured for single-ended or differential
operation. IOUTA and IOUTB can be converted into comple-
mentary single-ended voltage outputs, V
load resistor, R
section by Equation 5 through Equation 8. The differential
voltage, V
converted to a single-ended voltage via a transformer or
differential amplifier configuration. The ac performance of the
AD9744 is optimum and specified using a differential trans-
former-coupled output in which the voltage swing at IOUTA
and IOUTB is limited to ±0.5 V.
The distortion and noise performance of the AD9744 can be
enhanced when it is configured for differential operation. The
common-mode error sources of both IOUTA and IOUTB can
be significantly reduced by the common-mode rejection of a
transformer or differential amplifier. These common-mode
error sources include even-order distortion products and noise.
The enhancement in distortion performance becomes more
significant as the frequency content of the reconstructed wave-
form increases and/or its amplitude decreases. This is due to the
first-order cancellation of various dynamic common-mode
distortion mechanisms, digital feedthrough, and noise.
Performing a differential-to-single-ended conversion via a
transformer also provides the ability to deliver twice the
reconstructed signal power to the load (assuming no source
termination). Since the output currents of IOUTA and IOUTB
are complementary, they become additive when processed
differentially. A properly selected transformer will allow the
AD9744 to provide the required power and voltage levels to
different loads.
V
(
32
DIFF
×
OUTA
DIFF
R
=
LOAD
[
, existing between V
(
2
and V
LOAD
LOAD
×
/
DAC
R
and R
SET
, as described in the DAC Transfer Function
OUTB
DIFF
)
CODE
×
) or differential output (V
V
SET
OUTA
, is twice the value of the single-ended
REFIO
due to their ratiometric relationship,
or V
16383
OUTA
OUTB
)
/
), thus providing twice the
and V
16384
OUTA
]
OUTB
REF
and V
, and V
, can also be
DIFF
OUTB
) of the
DIFF
, via a
can be
(8)

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