ACPL-P340-000E Avago Technologies US Inc., ACPL-P340-000E Datasheet
ACPL-P340-000E
Specifications of ACPL-P340-000E
Related parts for ACPL-P340-000E
ACPL-P340-000E Summary of contents
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... IGBT with ratings up to 1200 For IGBTs with higher ratings, this optocoupler can be used to drive a discrete power stage which drives the IGBT gate. The ACPL-P340 and ACPL-W340 have the highest insula- tion voltage 891 V IORM peak respectively in the IEC/ EN/DIN EN 60747-5-2 ...
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... To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-P340-560E to order product of Stretched SO-6 Surface Mount package in Tape and Reel packaging with IEC/EN/ DIN EN 60747-5-2 Safety Approval in RoHS compliant. Example 2: ACPL-W340-000E to order product of Stretched SO-6 Surface Mount package in Tube packaging and RoHS compliant ...
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... NOM. (0.040 ±0.010) 9.7 ±0.250 (0.382 ±0.010) ACPL-W340 Stretched SO-6 Package (8 mm clearance) 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005 7.62 (0.300) + 0.127 6.807 0.005 ( ) 0.268 ...
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... Recommended Pb-Free IR Profi le Recommended refl ow condition as per JEDEC Standard, J-STD-020 (latest revision). Non- Halide Flux should be used. Regulatory Information The ACPL-P340/W340 is pending approval by the following organizations: UL Recognized under UL 1577, component recognition program (ACPL-W340) expected prior to product release. CSA CSA Component Acceptance Notice #5, File CA 88324 ...
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... Output IC Power Dissipation Total Power Dissipation Lead Solder Temperature Table 4. Recommended Operating Conditions Parameter Operating Temperature Output Supply Voltage Input Current (ON) Input Voltage (OFF) 5 ACPL-P340 ACPL-W340 Units Conditions 7.0 8.0 mm Measured from input terminals to output terminals, shortest distance through air. 8.0 8.0 mm Measured from input terminals to output terminals, shortest distance path along body ...
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Table 5. Electrical Specifi cations (DC) Unless otherwise noted, all typical values are at T specifi cations are at recommended operating conditions ( Ground V Parameter Symbol High Level Peak Output ...
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... PLH kV/ kV/ 25° C; all minimum/maximum specifi cations are at recommended A Device Min. Typ. Max. ACPL-P340 3750 ACPL-W340 5000 12 >50 0.6 135 Ground; all minimum and maximum mA -3.6 to 0.8 V, F(ON) F(OFF) Test Conditions Fig nF kHz, 10, 11, Duty Cycle = 50%, 12 ...
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... Maximum pulse width = 1 ms. 10. Pulse Width Distortion (PWD) is defi ned as |t 11. The diff erence between t and t between any two ACPL-P340 parts under the same test condition. PHL PLH 12. Pin 2 needs to be connected to LED common. 13. Common mode transient immunity in the high state is the maximum tolerable dV output will remain in the high state (i ...
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T - TEMPERATURE - °C A Figure 1. High output rail voltage vs. temperature 0.14 0.12 0.1 ...
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0 -40 -30 -20 - 100 ...
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V - FORWARD VOLTAGE - V F Figure 13. Input current vs. forward voltage Figure 14. I test circuit ...
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Figure 16. V test circuit Figure 17. V test circuit Figure 18. I test circuit FLH 12 ...
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Figure 19. UVLO test circuit mA kHz, 50% Duty Cycle 2 3 Figure 20 and t test ...
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... The gate resistor R and controls the IGBT collector voltage rise and fall times board design, care should be taken to avoid routing the IGBT collector or emitter traces close to the ACPL-P340 input as this can result in unwanted coupling of transient signals into ACPL-P340 and degrade performance. ...
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... ANODE CATHODE 3 Figure 24. ACPL-P340/W340 with PMOS and NMOS output stage for rail-to-rail output voltage 15 ACPL-P340 uses a power PMOS to deliver the large current and pull shown in Figure 24. This ensures that the IGBT’s gate . To ensure the V voltage is driven to the optimum intended level with no ...
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... Calculate Rg minimum from the I RC circuit with a voltage supplied by ACPL-P340/W340. V – V – ≥ I OLPEAK – 0 19.4 20 Step 1: Check the ACPL-P340/W340 power dissipation and increase Rg if necessary. The ACPL-P340/W340 total power dissipation ( equal to the sum of the emitter power ( • V • Duty Cycle E F ...
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... LED in the off state and I depend on the LN is close to the F also depends on the (i.e. when dV /dt > Figure 26. Recommended high-CMR drive circuit for the ACPL-P340/W340. I Direction LP Away from LED cathode through C LC Toward LED cathode through C LC and I results in a transient ...
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... The maximum dead time is equivalent to the diff erence between the maximum and minimum propagation delay diff erence specifi cations as shown in Figure 28. The maximum dead time for the ACPL-P340/ W340 is 200 ns (= 100 ns - (-100 ns)) over an operating temperature range of -40° 105C. ...
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... Under Voltage Lockout The ACPL-P340/W340 Under Voltage Lockout (UVLO) feature is designed to prevent the application of insuffi - cient gate voltage to the IGBT by forcing the ACPL-P340/ W340 output low during power-up. IGBTs typically require gate voltages achieve their rated V At gate voltages below 13 V typically, the V increases dramatically, especially at higher currents ...