LPC1114FBD48/301:1 NXP Semiconductors, LPC1114FBD48/301:1 Datasheet - Page 55
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
LPC1114FBD48/301:1
Manufacturer Part Number
LPC1114FBD48/301:1
Description
LPC1114FBD48/LQFP48/REEL13//30
Manufacturer
NXP Semiconductors
Series
LPC1100r
Datasheet
1.LPC1114FHN333015.pdf
(66 pages)
Specifications of LPC1114FBD48/301:1
Processor Series
LPC11
Core
ARM Cortex M0
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
8 KB
Interface Type
I2C, SPI, UART
Number Of Programmable I/os
28
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP-48
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC1114
Development Tools By Supplier
OM11049, OM11085
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
42
Eeprom Size
-
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1114FBD48/301:1
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
11. Application information
LPC1111_12_13_14
Product data sheet
11.1 ADC usage notes
11.2 XTAL input
The following guidelines show how to increase the performance of the ADC in a noisy
environment beyond the ADC specifications listed in
The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a
clock in slave mode, it is recommended that the input be coupled through a capacitor with
C
capacitor to ground C
mode, a minimum of 200 mV (RMS) is needed.
In slave mode the input clock signal should be coupled by means of a capacitor of 100 pF
(Figure
corresponds to a square wave signal with a signal swing of between 280 mV and 1.4 V.
The XTALOUT pin in this configuration can be left unconnected.
External components and models used in oscillation mode are shown in
Table 19
and the capacitances C
fundamental mode oscillation (the fundamental frequency is represented by L, C
R
not be larger than 7 pF. Parameters F
manufacturer (see
Fig 30. Slave mode operation of the on-chip oscillator
•
•
•
•
i
S
= 100 pF. To limit the input voltage to the specified range, choose an additional
). Capacitance C
The ADC input trace must be short and as close as possible to the LPC1111/12/13/14
chip.
The ADC input traces must be shielded from fast switching digital signals and noisy
power supply lines.
Because the ADC and the digital core share the same power supply, the power supply
line must be adequately filtered.
To improve the ADC performance in a very noisy environment, put the device in Sleep
mode during the ADC conversion.
30), with an amplitude between 200 mV (RMS) and 1000 mV (RMS). This
and
Table
All information provided in this document is subject to legal disclaimers.
Table
P
20. Since the feedback resistance is integrated on chip, only a crystal
in
g
Rev. 4 — 10 February 2011
which attenuates the input voltage by a factor C
Figure 31
X1
19).
and C
X2
represents the parallel package capacitance and should
need to be connected externally in case of
OSC
XTALIN
LPC1xxx
C i
100 pF
, C
L
, R
S
002aae788
32-bit ARM Cortex-M0 microcontroller
C g
and C
LPC1111/12/13/14
Table
P
are supplied by the crystal
8:
i
/(C
© NXP B.V. 2011. All rights reserved.
Figure 31
i
+ C
g
). In slave
L
and
and in
55 of 66