MCP4341T-104E/ST Microchip Technology, MCP4341T-104E/ST Datasheet - Page 33
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MCP4341T-104E/ST
Manufacturer Part Number
MCP4341T-104E/ST
Description
IC DGTL POT QUAD 100K 20TSSOP
Manufacturer
Microchip Technology
Series
WiperLock™r
Datasheet
1.MCP4361-503EML.pdf
(80 pages)
Specifications of MCP4341T-104E/ST
Taps
129
Resistance (ohms)
100K
Number Of Circuits
4
Temperature Coefficient
150 ppm/°C Typical
Memory Type
Non-Volatile
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Resistance In Ohms
100K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.2.1
This memory can be grouped into two uses of
non-volatile memory. These are:
•
•
The non-volatile wipers starts functioning below the
devices V
4.2.1.1
These locations allow the user to store up to 5 (9-bit)
locations worth of information.
4.2.1.2
These locations contain the wiper values that are
loaded into the corresponding volatile wiper register
whenever the device has a POR/BOR event. There are
four registers, one for each resistor network.
The non-volatile wiper register enables stand-alone
operation of the device (without Microcontroller control)
after being programmed to the desired value.
4.2.1.3
The Non-Volatile Wiper values will be initialized to
mid-scale value. This is shown in
The General purpose EEPROM memory will be
programmed to a default value of 0x000.
It is good practice in the manufacturing flow to
configure the device to your desired settings.
TABLE 4-2:
© 2009 Microchip Technology Inc.
-502
-103
-503
-104
General Purpose Registers
Non-Volatile Wiper Registers
100.0 kΩ Mid scale
10.0 kΩ
50.0 kΩ
5.0 kΩ
POR
NON-VOLATILE MEMORY
(EEPROM)
General Purpose Registers
Non-Volatile Wiper Registers
Factory Initialization of Non-Volatile
Memory (EEPROM)
/V
BOR
DEFAULT FACTORY
SETTINGS SELECTION
Mid scale
Mid scale
Mid scale
trip point.
8-bit 7-bit
80h
80h
80h
80h
Wiper
Table
Code
40h
40h
40h
40h
4-2.
Disabled
Disabled
Disabled
Disabled
4.2.1.4
There are 5 non-volatile bits that are not directly
mapped into the address space. These bits control the
following functions:
• EEPROM Write Protect
• WiperLock Technology for Non-Volatile Wiper 0
• WiperLock Technology for Non-Volatile Wiper 1
• WiperLock Technology for Non-Volatile Wiper 2
• WiperLock Technology for Non-Volatile Wiper 3
The operation of WiperLock Technology is discussed in
Section 5.3. The state of the WL0, WL1, WL2, WL3,
and WP bits is reflected in the STATUS register (see
Register
EEPROM Write Protect
All internal EEPROM memory can be Write Protected.
When EEPROM memory is Write Protected, Write
commands to the internal EEPROM are prevented.
Write Protect (WP) can be enabled/disabled by two
methods. These are:
• External WP Hardware pin (MCP43X1 devices
• Non-Volatile configuration bit (WP)
High Voltage commands are required to enable and
disable the non-volatile WP bit. These commands are
shown in Section 7.9 “Modify Write Protect or
WiperLock Technology (High Voltage)”.
To write to EEPROM, both the external WP pin and the
internal WP EEPROM bit must be disabled. Write
Protect does not block commands to the volatile
registers.
4.2.2
There are seven Volatile Memory locations. These are:
• Volatile Wiper 0
• Volatile Wiper 1
• Volatile Wiper 2
• Volatile Wiper 3
• Status Register
• Terminal Control (TCON0) Register 0
• Terminal Control (TCON)1 Register 1
The volatile memory starts functioning at the RAM
retention voltage (V
only)
4-1).
VOLATILE MEMORY (RAM)
Special Features
MCP434X/436X
RAM
).
DS22233A-page 33