MAX1348BETX+T Maxim Integrated Products, MAX1348BETX+T Datasheet
MAX1348BETX+T
Specifications of MAX1348BETX+T
Related parts for MAX1348BETX+T
MAX1348BETX+T Summary of contents
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... Low-Power DAC: 1.5mA ♦ Evaluation Kit Available (Order MAX1258EVKIT) SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. AutoShutdown is a trademark of Maxim Integrated Products, Inc. Pin Configurations appear at end of data sheet. Ordering Information/Selector Guide REF ANALOG ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ABSOLUTE MAXIMUM RATINGS AV to AGND .........................................................-0.3V to +6V DD DGND to AGND.....................................................-0.3V to +0. .......................................................-3.0V to +0. Digital Inputs to DGND.............................................-0.3V to +6V Digital ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ELECTRICAL CHARACTERISTICS (continued) ( 4.75V to 5.25V, external reference otherwise noted. Typical values are at AV PARAMETER SYMBOL Acquisition Time t ACQ Conversion Time ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ELECTRICAL CHARACTERISTICS (continued) ( 4.75V to 5.25V, external reference otherwise noted. Typical values are at AV PARAMETER SYMBOL DC ACCURACY (Note 10) Resolution Integral ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ELECTRICAL CHARACTERISTICS (continued) ( 4.75V to 5.25V, external reference otherwise noted. Typical values are at AV PARAMETER SYMBOL INTERNAL REFERENCE REF1 Output Voltage REF1 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ELECTRICAL CHARACTERISTICS (continued) ( 4.75V to 5.25V, external reference otherwise noted. Typical values are at AV PARAMETER SYMBOL POWER REQUIREMENTS (Note 15) Digital Positive-Supply ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ELECTRICAL CHARACTERISTICS (continued) ( 4.75V to 5.25V, external reference otherwise noted. Typical values are at AV PARAMETER SYMBOL CS or CNVST Rise to EOC ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ( 5V, external V = 4.096V REF at REF +25°C, unless otherwise noted.) A ANALOG SHUTDOWN CURRENT vs. ANALOG SUPPLY VOLTAGE 0.5 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ( 5V, external V = 4.096V REF at REF +25°C, unless otherwise noted.) A ANALOG SUPPLY CURRENT vs. SAMPLING RATE 3.0 2.5 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ( 5V, external V = 4.096V REF at REF +25°C, unless otherwise noted.) A INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE 4.12 4.11 4.10 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports ( 5V, external V = 4.096V REF at REF +25°C, unless otherwise noted.) A TEMPERATURE SENSOR ERROR vs. TEMPERATURE 1.00 0.75 0.50 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports MAX1340 MAX1342 MAX1346 1, 2, 16–19 16–19, 16–19 24, 25, 31, 24 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports MAX1340 MAX1342 MAX1346 27–31, 34 27–31, 34 — — — — — — 24, 25 — — — 27–30 — — ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Detailed Description The MAX1340/MAX1342/MAX1346/MAX1348 integrate a multichannel 12-bit ADC, and a quad 12-bit DAC in a single IC. The devices also include a temperature sen- sor and configurable GPIOs with ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports GPIOC0, GPIOA0, GPIOA1 GPIOC1 GPIO USER-PROGRAMMABLE I/O CONTROL OSCILLATOR SCLK CS DIN PORT DOUT TEMPERATURE SENSOR EOC LOGIC CONTROL CNVST AIN0 12-BIT FIFO AND SAR T/H ALU AIN5 ADC REF2/ ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Table 1. Command Byte (MSB First) REGISTER NAME BIT 7 Conversion* 1 Setup 0 ADC Averaging 0 DAC Select 0 Reset 0 GPIO Configure** 0 GPIO Write** 0 GPIO Read** ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports the setup register. See Figures 3 and 4 for the transfer- function graphs. Program a pair of analog inputs for dif- ferential operation by writing a one to the appropriate ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports In addition to the 12-bit ADC, the MAX1340/MAX1342/ MAX1346/MAX1348 also include four voltage-output, 12-bit, monotonic DACs with less than 4 LSB integral nonlinearity error and less than 1 LSB differential ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports The GPIOs can sink and source current. The MAX1342/MAX1348 GPIOA0 and GPIOA1 can sink and source up to 15mA. GPIOC0 and GPIOC1 can sink 4mA and source 2mA. See Table ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports A conversion is not performed requested on a channel or one of the channel pairs that has been con- figured as CNVST or REF2. For channels configured ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Table 5. Setup Register* BIT NAME BIT — 7 (MSB) — 6 CKSEL1 5 CKSEL0 4 REFSEL1 3 REFSEL0 2 DIFFSEL1 1 DIFFSEL0 0 (LSB) * See below for bit ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Table 5c. Clock Mode 11 VOLTAGE REFSEL1 REFSEL0 REFERENCE Internal (DAC 0 0 and ADC) External single- ended (REF1 0 1 for DAC and REF2 for ADC) Internal (ADC) 1 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Table 6. Unipolar-Mode Register (Addressed Through the Setup Register) BIT NAME BIT UCH0/1 7 (MSB) Configure AIN0 and AIN1 for unipolar differential conversion. UCH2/3 6 Configure AIN2 and AIN3 for ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Unipolar/Bipolar Registers The final 2 bits (LSBs) of the setup register control the unipolar-/bipolar-mode address registers. Set DIFFSEL[1: write to the unipolar-mode regis- ter. Set bits DIFFSEL[1:0] ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Table 9 details the four scan modes available in the ADC conversion register. All four scan modes allow averaging as long as the AVGON bit, bit 4 in the averaging ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports byte load data from DIN to the GPIO configuration reg- ister in the MAX1342/MAX1348. See Tables 13 and 14. The register bits are updated after the last CS rising edge. ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Table 17. DAC Serial-Interface Configuration 16-BIT SERIAL WORD MSB CONTROL BITS D11 D10 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Table 18. DAC Power-Up and Power-Down Commands CONTROL DATA BITS BITS — — — ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Partial Reads and Partial Writes If the first byte of an entry in the FIFO is partially read (CS is pulled high after fewer than eight SCLK cycles), the remaining ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports CNVST CS SCLK DOUT EOC Figure 6. Clock Mode 00—After writing a command byte, set CNVST low for at least 40ns to begin a conversion. t CSW CNVST (ACQUISITION 1) ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports DIN CS SCLK DOUT t DOV EOC Figure 8. Clock Mode 10—The command byte to the conversion register begins the acquisition (CNVST is not required). and averaging registers to correctly ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports DIN (ACQUISITION1) CS SCLK DOUT EOC X = DON'T CARE. Figure 9. Clock Mode 11—Externally Timed Acquisition, Sampling, and Conversion without CNVST Externally Clocked Acquisitions and Conversions Using the Serial ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports SCLK DIN D15 D14 t DOE D15 DOUT D7 t CSS t CSPWH CS Figure 10. DAC/GPIO Serial-Interface Timing (Clock Modes 00, 01, and ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports SCLK D15 DIN t DOE D15 DOUT D7 t CSS t CSPWH CS Figure 11. DAC/GPIO Serial-Interface Timing (Clock Mode 11) SCLK 1 2 ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports CS t GSU GPIO INPUT/OUTPUT Figure 13. GPIO Timing LDAC OUT_ Figure 14. LDAC Functionality Drive LDAC low to transfer the content of the input reg- isters to the DAC ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Unipolar ADC Offset Error For an ideal converter, the first transition occurs at 0.5 LSB, above zero. Offset error is the amount of deviation between the measured first transition point ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports Full-Power Bandwidth A large -0.5dBFS analog input signal is applied to an ADC, and the input frequency is swept up to the point where the amplitude of the digitized conversion ...
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Multichannel ADCs/DACs with FIFO, Temperature Sensing, and GPIO Ports TOP VIEW D.C. 1 D.C. 2 EOC DGND 5 MAX1340 DOUT 6 SCLK 7 DIN 8 OUT0 ...
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