MAX1414CAI+ Maxim Integrated Products, MAX1414CAI+ Datasheet - Page 14

• Manufacturer Part Number: MAX1414CAI+
• Description: IC DAS 16BIT LP 28-SSOP
• Manufacturer: Maxim Integrated Products
• Type: Data Acquisition System (DAS)r

Specifications of MAX1414CAI+

• Resolution (bits): 16 b
• Sampling Rate (per Second): 60
• Data Interface: Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Number Of Converters: 1
• Resolution: 16 bit
• Interface Type: Serial (4-Wire, SPI, QSPI, Microwire)
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Power Dissipation: 762 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Low-Power, 16-Bit Multichannel DAS with
Internal Reference,10-Bit DACs, and RTC
14
MAX1407
MAX1414
10
11
12
13
14
15
16
17
18
19
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1
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MAX1408
10
11
12
13
14
15
16
17
18
19
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1
2
3
4
5
6
7
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MAX1409
11
12
13
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10
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1
2
3
4
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6
7
8
9
CLKOUT
RESET
AGND
CLKIN
SHDN
DRDY
OUT1
FOUT
AV
CPLL
WU1
WU2
PIN
FB2
FB1
FB1
REF
IN7
IN6
IN4
IN0
IN1
IN2
D0
DD
Force/Sense DAC2 Feedback Input
Analog Input. Analog input to the negative mux only.
Force/Sense DAC1 Feedback Input
Digital Output. Three-state general-purpose digital output.
Force/Sense DAC1 Feedback Input
Analog Input. Analog input to the negative mux only.
Force/Sense DAC1 Output
Analog Input. Analog input to the positive mux only.
Analog Input. Analog input to both the positive and negative mux.
1.25V Reference Buffer Output/External Reference Input. Reference voltage
for the ADC and the DAC. Connect a 4.7µF capacitor to REF between REF
and AGND.
Analog Ground. Reference point for the analog circuitry. AGND connects to
the IC substrate.
Analog Supply Voltage
PLL Capacitor Connection Pin. Connect an 18nF ceramic capacitor between
CPLL and AV
Active-Low Wake-Up Input. Internally pulled up. The device will wake-up from
Sleep mode to Standby mode when WU1 is asserted.
Active-Low Wake-Up Input. Internally pulled up. The device will wake-up from
Sleep mode to Standby mode when WU2 is asserted.
Active-Low RESET Output. It remains low while AV
and stays low for a timeout period after AV
RESET is an open-drain output.
Analog Input. Analog input to both the positive and negative mux.
Analog Input. Analog input to both the positive and negative mux.
Programmable Shutdown Output. Goes low in Sleep mode.
Active-Low Data Ready Output. A logic low indicates that a new conversion
result is available in the Data register. DRDY returns high upon completion of
a full output word read operation. DRDY also signals the end of an ADC
offset-calibration.
2.4576MHz Clock Output. FOUT can be used to drive the input clock of a µP.
32kHz Crystal Output. Connect a 32kHz crystal between CLKIN and
CLKOUT.
32kHz Crystal Input. Connect a 32kHz crystal between CLKIN and CLKOUT.
DD
.
FUNCTION
DD
rises above the threshold.
DD
Pin Description
is below the threshold