LTC1290CCN#PBF Linear Technology, LTC1290CCN#PBF Datasheet - Page 17

• Manufacturer Part Number: LTC1290CCN#PBF
• Description: IC DATA ACQ SYS 12BIT 20-DIP
• Manufacturer: Linear Technology
• Type: Data Acquisition System (DAS), ADCr

Specifications of LTC1290CCN#PBF

• Resolution (bits): 12 b
• Sampling Rate (per Second): 50k
• Data Interface: Serial, Parallel
• Voltage Supply Source: Dual ±
• Voltage - Supply: ±5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MC68HC05C4 Code
START
A
*B11 IS MSB IN UNIPOLAR OR SIGN BIT IN BIPOLAR
LOCATION $61
LOCATION $62
PPLICATI
ANALOG
INPUTS
Hardware and Software Interface to Motorola
MC68HC05C4 Processor
MNEMONIC
D
LDA #$50
STA $0A
LDA #$FF
STA $06
LDA #$0F
STA $50
BCLR 0,$20
LDA $50
STA $0C
NOP
LDA $0B
LDA $0C
STA $61
STA $0C
NOP
BSET 0,$02
LDA $0B
LDA $0C
STA $62
OUT
MSB*
B11
•
•
•
•
B3
from LTC1290 Stored in MC68HC05C4 RAM
O
B10
LTC1290
B2
U
S
D OUT
B9
B1
SCLK
D IN
CS
Configuration Data for SPCR
Load Data Into SPCR ($0A)
Config. Data for Port C DDR
Load Data Into Port C DDR
Load LTC1290 D
Load LTC1290 D
CO Goes Low (CS Goes Low)
Load D
Load D
8 NOPs for Timing
Check SPI Status Reg
Load LTC1290 MSBs Into ACC
Store MSBs in $61
Start Next SPI Cycle
6 NOPs for Timing
CO Goes High (CS Goes High)
Check SPI Status Register
Load LTC1290 LSBs Into ACC
Store LSBs in $62
I FOR ATIO
U
LSB
B8
B0
IN
IN
B7
0
COMMENTS
Into ACC from $50
Into SPI, Start SCK
W
B6
0
CO
SCK
MOSI
MISO
IN
IN
MC68HC05C4
Data Into ACC
Data Into $50
B5
0
LTC1290 • AI09
B4
0
U
BYTE 1
BYTE 2
Parallel Port Microprocessors
When interfacing the LTC1290 to an MPU which has a
parallel port, the serial signals are created on the port with
software. Three MPU port lines are programmed to create
the CS, SCLK and D
port line reads the D
Intel 8051/8052/80C252 family.
Intel 8051
To interface to the 8051, the LTC1290 is programmed for
MSB-first format and 12-bit word length. The 8051 gener-
ates CS, SCLK and D
on the fourth.
Hardware and Software Interface to Intel 8051 Processor
ANALOG
INPUTS
*B11 IS MSB IN UNIPOLAR OR SIGN BIT IN BIPOLAR
R2
R3
D
MSB*
B11
•
•
•
•
•
•
•
•
OUT
B3
from LTC1290 Stored in 8051 RAM
B10
LTC1290
B2
IN
IN
OUT
signals for the LTC1290. A fourth
on three port lines and reads D
D OUT
B9
B1
SCLK
ACLK
line. An example is made of the
D IN
CS
LSB
B8
B0
B7
0
B6
0
P1.2
P1.3
P1.1
P1.4
ALE
LTC1290
B5
8051
0
LTC1290 • AI10
54
0
17
1290fe
OUT