LTC1292DCN8#PBF Linear Technology, LTC1292DCN8#PBF Datasheet - Page 12

• Manufacturer Part Number: LTC1292DCN8#PBF
• Description: IC DATA ACQ SYSTEM 12BIT 8-DIP
• Manufacturer: Linear Technology
• Type: Data Acquisition System (DAS)r

Specifications of LTC1292DCN8#PBF

• Resolution (bits): 12 b
• Sampling Rate (per Second): 60k
• Data Interface: Serial, Parallel
• Voltage Supply Source: Single Supply
• Voltage - Supply: 5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Number Of Elements: 1
• Resolution: 12Bit
• Architecture: SAR
• Sample Rate: 60KSPS
• Input Polarity: Unipolar
• Input Type: Voltage
• Rated Input Volt: 5V
• Differential Input: Yes
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Power Dissipation: 500mW
• Integral Nonlinearity Error: ±0.75LSB
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LTC1292/LTC1297
LABEL MNEMONIC
CONT
LOOP
8051 CODE
Sharing the Serial Interface
The LTC1292/LTC1297 can share the same two-wire
serial interface with other peripheral components or other
LTC1292/LTC1297s (Figure 6). In this case, the CS signals
decide which LTC1292 is being addressed by the MPU.
12
A
PPLICATI
MOV
CLR
SETB
CLR
NOP
NOP
NOP
NOP
SETB
CLR
SETB
CLR
MOV
MOV
RLC
SETB
CLR
DJNZ
MOV
MOV
O
ANALOG
OPERAND
P1,#02h
P1.3
P1.4
P1.4
P1.3
P1.3
P1.3
P1.3
R4,#08H
C,P1.1
A
P1.3
P1.3
R4,LOOP
R2,A
C,P1.1
INPUTS
U
D
CLK
OUT
S
CS
I FOR ATIO
U
COMMENTS
BIT 1 PORT 1 SET AS INPUT
CLK GOES LOW
CS GOES HIGH
CS GOES LO
4 NOP FOR LTC1297 t
Time) (Not Needed for LTC1292)
CLK GOES HIGH
CLK GOES LOW
CLK GOES HIGH
CLK GOES LOW
LOAD COUNTER
READ DATA BIT INTO CARRY
ROTATE DATA BIT INTO ACC
CLK GOES HIGH
CLK GOES LOW
NEXT BIT
STORE MSBs IN R2
READ DATA BIT INTO CARRY
Figure 5. Hardware and Software Interface to Intel 8051 Processor
LTC1292
LTC1297
D
CLK
OUT
CS
W
B11
B10
suCS
P1.4
P1.3
P1.1
U
(Wakeup
B9
8051
B8
B7
ANALOG CONSIDERATIONS
Grounding
The LTC1292/LTC1297 should be used with an analog
ground plane and single point grounding techniques. Do
not use wire wrapping techniques to breadboard and
evaluate the device. To achieve the optimum performance
LABEL MNEMONIC
R2
R3
B6
D
OUT
MSB
B11
B3
B5
FROM LTC1292/LTC1297 STORED IN 8051 RAM
CLR
RLC
CLR
MOV
RLC
SETB
CLR
MOV
RLC
SETB
CLR
MOV
SETB
RRC
RRC
RRC
RRC
MOV
AJMP
B10
B2
B4
B9
B1
B3
B8
B0
B2
OPERAND
A
A
SETB
P1.3
C,P1.1
A
P1.3
P1.3
C,P1.1
A
P1.3
P1.3
C,P1.1
P1.4
A
A
A
A
R3,A
CONT
B7
O
B1
B6
O
B0
B5
COMMENTS
O
CLEAR ACC
ROTATE DATA BIT (B3) INTO ACC
P1.3
CLK GOES LOW
READ DATA BIT INTO CARRY
ROTATE DATA BIT (B2) INTO ACC
CLK GOES HIGH
CLK GOES LOW
READ DATA BIT INTO CARRY
ROTATE DATA BIT (B1) INTO ACC
CLK GOES HIGH
CLK GOES LOW
READ DATA BIT INTO CARRY
CS GOES HIGH
ROTATE DATA BIT (B0) INTO ACC
ROTATE RIGHT INTO ACC
ROTATE RIGHT INTO ACC
ROTATE RIGHT INTO ACC
STORE LSBs IN R3
START NEXT CONVERSION
B4
O
LTC1292/7 F05
CLK GOES HIGH
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