MAX152CAP+ Maxim Integrated Products, MAX152CAP+ Datasheet - Page 6

• Manufacturer Part Number: MAX152CAP+
• Description: IC ADC 8BIT 1UA PWR-DWN 20-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX152CAP+

• Number Of Bits: 8
• Sampling Rate (per Second): 400k
• Data Interface: Parallel
• Number Of Converters: 3
• Power Dissipation (max): 640mW
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

+3V, 8-Bit ADC with 1µA Power-Down
Figure 1. Load Circuits for Data-Access Time Test
*See Digital Inferface Section.
6
____________________Pin Description
OUTPUTS
14-16
DATA
PIN
3-5
10
11
12
13
17
18
19
20
_______________________________________________________________________________________
1
2
6
7
8
9
3k
A. HIGH-Z TO V OH
WR/RDY
PWRDN
VREF+
NAME
D1-D3
MODE
D4-D6
VREF-
GND
V
INT
V
V
RD
D0
CS
D7
DD
SS
IN
Analog Input. Range is
VREF- ≤ V
Three-State Data Output (LSB)
Three-State Data Outputs
Write Control Input/Ready Status
Output*
Mode Selection Input is internally
pulled low with a 15µA current source.
MODE = 0 activates read mode
MODE = 1 activates write-read mode*
Read Input must be low to access
data.*
Interrupt Output goes low to indicate
end of conversion.*
Ground
Lower limit of reference span. Sets the
zero-code voltage. Range is
V
Upper limit to reference span. Sets the
full-scale input voltage. Range is
VREF- < VREF+ ≤ V
Chip-Select Input must be low for the
device recognize WR or RD inputs.
Three-State Data Outputs
Three-State Data Output (MSB)
Powerdown Input reduces supply
current when low.
Negative Supply. Unipolar: V SS = 0V,
Bipolar: V
Positive Supply, +3V.
SS
C
L
≤ VREF- < VREF+.
OUTPUTS
DATA
IN
SS
≤ VREF+.
= -3V.
FUNCTION
B. HIGH-Z TO V OL
V DD
DD
.
3k
C
L
Figure 2. Load Circuits for Data-Hold TIme Test
The MAX152 uses a half-flash conversion technique
(see Functional Diagram ) in which two 4-bit flash ADC
sections achieve an 8-bit result. Using 15 compara-
tors, the flash ADC compares the unknown input volt-
age to the reference ladder and provides the upper 4
data bits.
An internal digital-to-analog converter (DAC) uses the
4 most significant bits (MSBs) to generate the analog
result from the first flash conversion and a residue volt-
age that is the difference between the unknown input
and the DAC voltage. The residue is then compared
again with the flash comparators to obtain the lower 4
data bits (LSBs).
The MAX152 is characterized for operation between
+3.0V and +3.6V. Conversion times decrease as the
supply voltage increases. The supply current decreas-
es rapidly with decreasing supply voltage. (See
Typical Operating Characteristics .)
In burst-mode or low sample-rate applications, the
MAX152 can be shut down between conversions,
reducing supply current to microamp levels (see
Typical Operating Characteristics ). A logic low on the
PWRDN pin shuts the device down, reducing supply
current to typically 1µA when powered from a single 3V
supply. A logic high on PWRDN wakes up the
MAX152. A new conversion can be started within
900ns of the PWRDN pin being driven high (this
includes both the power-up delay and the track/hold
acquisition time). If power-down mode is not required,
connect PWRDN to V
_______________Detailed Description
OUTPUTS
DATA
3k
A. V OH TO HIGH-Z
DD
10pF
.
Converter Operation
OUTPUTS
DATA
Power-Down Mode
B. V OL TO HIGH-Z
V DD
3k
10pF