AD7878SQ Analog Devices Inc, AD7878SQ Datasheet
AD7878SQ
Specifications of AD7878SQ
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AD7878SQ Summary of contents
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FEATURES Complete ADC with DSP Interface, Comprising: Track/Hold Amplifier with 2 s Acquisition Time 7 s A/D Converter 3 V Zener Reference 8-Word FIFO and Interface Logic 72 dB SNR at 10 kHz Input Frequency Interfaces to High Speed ...
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AD7878–SPECIFICATIONS Parameter 2 DYNAMIC PERFORMANCE 3 Signal-to-Noise Ratio (SNR MIN MAX Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise Intermodulation Distortion (IMD) Second Order Terms Third Order Terms Track/Hold Acquisition Time DC ACCURACY ...
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TIMING CHARACTERISTICS Limit Limit at T MIN MAX Parameter (L Grade) ( Grades CLK IN Cycles 2 CLK IN Cycles ...
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AD7878 Pin Pin Number Mnemonic Function 11 ADD0 Address Input. This control input determines whether the word placed on the output data bus during a read operation is a data word from the FIFO RAM or the contents of the ...
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... ORDERING GUIDE Signal- Temperature to-Noise 1, 2 Model Range Ratio AD7878JN + AD7878AQ – + AD7878SQ – +125 AD7878KN + AD7878BQ – + AD7878LN + AD7878SE – +125 AD7878JP + AD7878KP + AD7878LP + NOTES 1 To order MIL-STD-883, Class B processed parts, add /883B to part number. Contact our local sales office for military data sheet. ...
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AD7878 INTERNAL FIFO MEMORY The internal FIFO memory of the AD7878 consists of eight memory locations. Each word in memory contains 13 bits of information—12 bits of data from the conversion result and one additional bit which contains information as ...
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CLK IN cycles. Therefore, if read or write operations can occur during t periods, it means that the conversion time for ...
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AD7878 Extended Read/Write Operation As described earlier, a read/write operation to the AD7878 can cause spurious on-chip transients. Should these transients occur while the track/hold is going from track to hold mode, it may result in an incorrect value of ...
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Figure 11 shows a typical plot of effective number of bits versus frequency for an AD7878KN with a sampling frequency of 100 kHz. The effective number of bits typically falls between 11.7 and 11.85 corresponding to SNR figures of 72.2 ...
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AD7878 CONVERSION TIMING The track-and-hold on the AD7878 goes from track-to-hold mode on the rising edge of CONVST, and the value of V this point is the value which will be converted. However, the conversion actually sorts on the next ...
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Positive Full-Scale Adjust Apply a voltage of 2.9978 V (FS/2 – 3/2 LSBs until the ADC output code flickers between 0111 1111 1110 and 0111 1111 1111. Negative Full-Scale Adjust Apply a voltage of –2.9993 V (–FS/2 + ...
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AD7878 The MC68000 AS and R/W outputs are used to generate sepa- rate DMWR and DMRD inputs for the AD7878. As with the three interfaces previously described, WAIT states are inserted if a read/write operation is attempted while the track/hold ...
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Establish a single point analog ground (star ground) separate from the logic system ground at Pin 22 (AGND dose as possible to the AD7878, as shown in Figure 22. Connect all other grounds and Pin 7 (AD7878 DGND) ...
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AD7878 Figure 23. Data Acquisition Circuit Using the AD7878 Figure 24. PCB Silkscreen for Figure 23 –14– REV. A ...
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Figure 25. PCB Component Side Layout for Figure 23 REV. A Figure 26. PCB Solder Side Layout for Figure 23 –15– AD7878 ...
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AD7878 Table IV. TMS32010/TMS32020 Interface Connections IDC Signal Connect TMS32010 Contact No. Mnemonic Signal 1 R/W — STRB 2 — DMRD DEN 3 DMWR READY — RESET RESET 7 ALFL INT 8 9 ADD0 ...