AD7892AN-1 Analog Devices Inc, AD7892AN-1 Datasheet - Page 11

IC ADC 12BIT LP 500KSPS 24-DIP

AD7892AN-1

Manufacturer Part Number
AD7892AN-1
Description
IC ADC 12BIT LP 500KSPS 24-DIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7892AN-1

Mounting Type
Through Hole
Package / Case
24-DIP (0.300", 7.62mm)
Rohs Status
RoHS non-compliant
Number Of Bits
12
Sampling Rate (per Second)
500k
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
90mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
No. Of Bits
12 Bit
Features
Single Supply, 12?Bit, 500kSPS ADC
No. Of Channels
1
Interface Type
Parallel
Number Of Elements
1
Resolution
12Bit
Architecture
SAR
Sample Rate
500KSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±5/±10V
Differential Input
No
Power Supply Requirement
Single
Single Supply Voltage (typ)
5V
Single Supply Voltage (min)
4.75V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
90mW
Differential Linearity Error
±1LSB
Integral Nonlinearity Error
±1.5LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
24
Package Type
PDIP
Input Signal Type
Single-Ended
Lead Free Status / Rohs Status
Not Compliant
The designed code transitions occur midway between successive
integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs). Output
coding is two’s complement binary with 1 LSB = FSR/4096 =
20 V/4096 = 4.88 mV for the ± 10 V range and 1 LSB = FSR/
4096 = 10 V/4096 = 2.44 mV for the ± 5 V range. The ideal
input/output transfer function for the AD7892-1 is shown in
Table I.
AD7892-2
The analog input section for the AD7892-2 contains no biasing
resistors. The analog input looks directly into the track/hold
input stage. The analog input range on the V
+2.5 V. The V
connected to a potential then that potential must be AGND.
The V
of the AD7892-2’s track/hold. The value of this input sampling
capacitor is nominally 10 pF.
Once again, the designed code transitions occur midway be-
tween successive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs,
5/2 LSBs). Output coding is straight (natural) binary with
1 LSB = FSR/4096 = 2.5 V/4096 = 0.61 mV. The ideal input/
output transfer function for the AD7892-2 is shown in Table II.
Analog Input
+FSR/2 – 3/2 LSB
+FSR/2 – 5/2 LSBs (9.98779 or 4.99390)
+FSR/2 – 7/2 LSBs (9.98291 or 4.99146)
AGND + 3/2 LSB (0.00732 or 0.00366)
AGND + 1/2 LSB (0.00244 or 0.00122)
AGND – 1/2 LSB (–0.00244 or –0.00122)
AGND – 3/2 LSB (–0.00732 or –0.00366)
–FSR/2 + 5/2 LSB (–9.98779 or –4.99390)
–FSR/2 + 3/2 LSB (–9.99268 or –4.99634)
–FSR/2 + 1/2 LSB (–9.99756 or –4.99878)
NOTES
1
2
3
Analog Input
+FSR – 3/2 LSB
+FSR – 5/2 LSBs (2.498474 V)
+FSR – 7/2 LSBs (2.497864 V)
AGND + 5/2 LSB (0.001526 V)
AGND + 3/2 LSB (0.00916 V)
AGND + 1/2 LSB (0.000305 V)
NOTES
1
2
FSR is full-scale range and REF IN = +2.5 V, is 20 V for the ± 10 V range and 10 V
1 LSB = FSR/4096 = 4.88 mV (± 10 V range) and 2.44 mV (± 5 V range) with REF
± 10 V range or ± 5 V range.
FSR is full-scale range and is 2.5 V with REF IN = +2.5 V.
1 LSB = FSR/4096 = 0.61 mV with REF IN = +2.5 V.
for the ± 5 V range.
IN = +2.5 V.
Table II. Ideal Input/Output Code Table for the AD7892-2
Table I. Ideal Input/Output Code Table for the AD7892-1
IN1
input connects directly to the input sampling capacitor
1, 2
IN2
1, 2
(2.499084 V)
input can be left unconnected but if it is
(9.99268 or 4.99634)
Digital Output
Code Transition
111 . . . 110 to 111 . . . 111
111 . . . 110 to 111 . . . 110
111 . . . 100 to 111 . . . 101
000 . . . 010 to 010 . . . 011
000 . . . 001 to 001 . . . 010
000 . . . 000 to 000 . . . 001
3
011 . . . 110 to 011 . . . 111
011 . . . 101 to 011 . . . 110
011 . . . 100 to 011 . . . 101
000 . . . 001 to 000 . . . 010
000 . . . 000 to 000 . . . 001
111 . . . 111 to 000 . . . 000
111 . . . 110 to 111 . . . 111
100 . . . 010 to 100 . . . 011
100 . . . 001 to 100 . . . 010
100 . . . 000 to 100 . . . 001
Digital Output
Code Transition
IN1
input is 0 V to
AD7892-3
Figure 5 shows the analog input section for the AD7892-3. The
analog input range is ± 2.5 V on the V
can be left unconnected but if it is connected to a potential then
that potential must be AGND. The input resistance on the V
is 1.8 kΩ nominal. As a result, the V
from a low impedance source. The resistor attenuator stage is
followed by the high input impedance stage of the track/hold
amplifier. This resistor attenuator stage allows the input voltage
to go to ± 7 V without damaging the AD7892-3.
The designed code transitions occur midway between succes-
sive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs).
Output coding is two’s complement binary with 1 LSB = FSR/
4096 = 5 V/4096 = 1.22 mV with REF IN = +2.5 V. The ideal
input/output transfer function for the AD7892-3 is shown in
Table III.
Analog Input
+FSR/2 – 3/2 LSB
+FSR/2 – 5/2 LSBs (2.49695)
+FSR/2 – 7/2 LSBs (2.49573)
AGND + 3/2 LSB (0.00183)
AGND + 1/2 LSB (0.00061)
AGND – 1/2 LSB (–0.00061)
AGND – 3/2 LSB (–0.00183)
–FSR/2 + 5/2 LSB (–2.49695)
–FSR/2 + 3/2 LSB (–2.49817)
–FSR/2 + 1/2 LSB (–2.49939)
NOTES
1
2
FSR is full-scale range and is 5 V with REF IN = +2.5 V.
1 LSB = FSR/4096 = 1.22 mV with REF IN = +2.5 V.
Table III. Ideal Input/Output Code Table for the AD7892-3
REF OUT/
REF IN
AGND
V
V
IN2
IN1
*
1, 2
* UNCONNECTED INTERNALLY ON THE AD7892-3
(2.49817)
2k
3.25k
REFERENCE
3.25k
+2.5
IN1
IN1
Digital Output
Code Transition
011 . . . 110 to 011 . . . 111
011 . . . 110 to 011 . . . 110
011 . . . 110 to 011 . . . 101
000 . . . 001 to 000 . . . 010
000 . . . 000 to 000 . . . 001
111 . . . 111 to 000 . . . 000
111 . . . 110 to 111 . . . 111
100 . . . 010 to 100 . . . 011
100 . . . 001 to 100 . . . 010
100 . . . 000 to 100 . . . 001
input should be driven
input. The V
TO ADC
REFERENCE
CIRCUITRY
TO HIGH
IMPEDANCE
SHA INPUT
AD7892
IN2
input
IN1

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