AD7856KR-REEL Analog Devices Inc, AD7856KR-REEL Datasheet - Page 27

• Manufacturer Part Number: AD7856KR-REEL
• Description: IC ADC 14BIT 8CH 5V 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7856KR-REEL

• Rohs Status: RoHS non-compliant
• Number Of Bits: 14
• Sampling Rate (per Second): 285k
• Data Interface: 8051, QSPI™, Serial, SPI™ µP
• Number Of Converters: 2
• Power Dissipation (max): 89.25mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)

REV. A
Interface Mode 2 Configuration
Figure 35 shows the flowchart for configuring the part in Inter-
face Mode 2. In this case the read and write operations take
place simultaneously via the serial port. Writing all 0s ensures
PREVIOUS CONVERSION RESULT ON DOUT
APPLY SYNC (IF REQUIRED), SCLK, READ
PIN, AND WRITE CHANNEL SELECTION
WAIT APPROX 200ns AFTER
CONVST RISING EDGE
Figure 35. Flowchart for Setting Up, Reading and Writing in Interface Mode 2
WAIT 150ms FOR AUTOMATIC CALIBRATION
DOUT PIN, AND WRITE CHANNEL SELECTION
APPLY SYNC (IF REQUIRED), SCLK, READ
WAIT FOR BUSY SIGNAL TO GO LOW
POWER-ON, APPLY CLKIN SIGNAL,
CURRENT CONVERSION RESULT ON
YES
WAIT FOR BUSY BIT = 0
PULSE CONVST PIN
DATA DURING
CONVERSION
CONVERSION
INTERFACE
SOFTWARE
TRANSFER
INITIATE
START
SERIAL
MODE
OR
IN
?
?
?
NO
NO
2
NOTE 1: WHEN USING THE SOFTWARE CONVERSION START AND TRANSFERRING DATA
DURING CONVERSION, THE USER MUST ENSURE THAT THE CONTROL REGISTER WRITE
OPERATION EXTENDS BEYOND THE FALLING EDGE OF BUSY. THE FALLING EDGE OF
BUSY RESETS THE CONVST BIT TO 0 AND ONLY AFTER THIS TIME CAN IT BE
REPROGRAMMED TO 1 TO START THE NEXT CONVERSION.
YES
–27–
that no valid data is written to any of the registers. When using
the software conversion start and transferring data during con-
version, Note 1 must be obeyed.
APPLY SYNC (IF REQUIRED), SCLK, WRITE
TO CONTROL REGISTER SETTING NEXT
WAIT FOR BUSY SIGNAL TO GO LOW
CHANNEL, CONVST BIT TO 1, READ
CONVERSION JUST COMPLETED
RESULT ON DOUT PIN FOR
WAIT FOR BUSY BIT = 0
DATA DURING
CONVERSION
TRANSFER
?
OR
NO
YES
APPLY SYNC (IF REQUIRED), SCLK, WRITE
TO CONTROL REGISTER SETTING NEXT
PREVIOUS CONVERSION RESULT ON
CHANNEL, CONVST BIT TO 1, READ
DOUT PIN (NOTE 1)
AD7856