AD7687BRMZ Analog Devices Inc, AD7687BRMZ Datasheet - Page 7

IC ADC 16BIT 250KSPS 10-MSOP

AD7687BRMZ

Manufacturer Part Number
AD7687BRMZ
Description
IC ADC 16BIT 250KSPS 10-MSOP
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7687BRMZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
16
Sampling Rate (per Second)
250k
Number Of Converters
1
Power Dissipation (max)
12.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP (0.118", 3.00mm Width)
Resolution (bits)
16bit
Sampling Rate
250kSPS
Input Channel Type
Differential
Supply Voltage Range - Analog
2.3V To 5.5V
Supply Voltage Range - Digital
1.8V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7687CBZ - BOARD EVALUATION FOR AD7687
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Analog Inputs
Supply Voltages
Storage Temperature Range
Junction Temperature
Lead Temperature Range
1
See the Analog Input section.
IN+
REF
VDD, VIO to GND
VDD to VIO
Digital Inputs to GND
Digital Outputs to GND
1
, IN−
1
Rating
GND − 0.3 V to VDD + 0.3 V
or ±130 mA
GND − 0.3 V to VDD + 0.3 V
−0.3 V to +7 V
±7 V
−0.3 V to VIO + 0.3 V
−0.3 V to VIO + 0.3 V
−65°C to +150°C
150°C
JEDEC J-STD-20
30% VIO
1
2
2V IF VIO ABOVE 2.5V, VIO – 0.5V IF VIO BELOW 2.5V.
0.8V IF VIO ABOVE 2.5V, 0.5V IF VIO BELOW 2.5V.
t
DELAY
TO SDO
Figure 3. Load Circuit for Digital Interface Timing
2V OR VIO – 0.5V
0.8V OR 0.5V
Figure 4. Voltage Levels for Timing
50pF
C
L
Rev. A | Page 7 of 28
500μA
500μA
2
1
I
I
OL
OH
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type
10-Lead QFN (LFCSP)
10-Lead MSOP
ESD CAUTION
70% VIO
JA
is specified for the worst-case conditions, that is, a device
t
DELAY
2V OR VIO – 0.5V
0.8V OR 0.5V
1.4V
2
1
θ
48.7
200
JA
θ
2.96
44
JC
AD7687
Unit
°C
°C

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