AD7687BRMZ Analog Devices Inc, AD7687BRMZ Datasheet - Page 24

IC ADC 16BIT 250KSPS 10-MSOP

AD7687BRMZ

Manufacturer Part Number
AD7687BRMZ
Description
IC ADC 16BIT 250KSPS 10-MSOP
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7687BRMZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
16
Sampling Rate (per Second)
250k
Number Of Converters
1
Power Dissipation (max)
12.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP (0.118", 3.00mm Width)
Resolution (bits)
16bit
Sampling Rate
250kSPS
Input Channel Type
Differential
Supply Voltage Range - Analog
2.3V To 5.5V
Supply Voltage Range - Digital
1.8V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7687CBZ - BOARD EVALUATION FOR AD7687
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD7687
APPLICATION HINTS
LAYOUT
The printed circuit board that houses the AD7687 should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. The pinout of the
AD7687, with all its analog signals on the left side and all its
digital signals on the right side, eases this task.
Avoid running digital lines under the device because these
couple noise onto the die, unless a ground plane under the
AD7687 is used as a shield. Fast switching signals, such as CNV
or clocks, should never run near analog signal paths. Crossover
of digital and analog signals should be avoided
At least one ground plane should be used. It could be common
or split between the digital and analog sections. In the latter
case, the planes should be joined underneath the AD7687s.
The AD7687 voltage reference input REF has a dynamic input
Figure 47. Example of Layout of the AD7687 (Top Layer)
impedance and should be decoupled with minimal parasitic
inductances. This is done by placing the reference decoupling
ceramic capacitor close to, and ideally right up against, the REF
and GND pins and connecting it with wide, low impedance
traces.
Finally, the power supplies VDD and VIO of the AD7687
should be decoupled with ceramic capacitors (typically 100 nF)
placed close to the AD7687 and connected using short and wide
traces to provide low impedance paths and reduce the effect of
glitches on the power supply lines.
An example of layout following these rules is shown in
Figure 47 and Figure 48.
EVALUATING THE AD7687’S PERFORMANCE
Other recommended layouts for the AD7687 are outlined
Figure 48. Example of Layout of the AD7687 (Bottom Layer)
in the documentation of the evaluation board for the AD7687
(EVAL-AD7687). The evaluation board package includes
a fully assembled and tested evaluation board, documentation,
and software for controlling the board from a PC via the
EVAL-CONTROL BRD3.
Rev. A | Page 24 of 28

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