AD7715AN-5 Analog Devices Inc, AD7715AN-5 Datasheet - Page 31

• Manufacturer Part Number: AD7715AN-5
• Description: IC ADC 16BIT 5V 16-DIP
• Manufacturer: Analog Devices Inc

Specifications of AD7715AN-5

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Rohs Status: RoHS non-compliant
• Number Of Bits: 16
• Sampling Rate (per Second): 500
• Number Of Converters: 1
• Power Dissipation (max): 9.5mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Resolution (bits): 16bit
• Sampling Rate: 500SPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Supply Current: 1.1mA
• Digital Ic Case Style: DIP
• For Use With: EVAL-AD7715-3EBZ - BOARD EVALUATION FOR AD7715
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

CONFIGURING THE AD7715
The AD7715 contains three on-chip registers which the user
accesses via the serial interface. Communication with any of
these registers is initiated by writing to the communications
register first. Figure 10 outlines a flow chart of the sequence
which is used to configure all registers after a power-up or reset.
The flowchart also shows two different read options—the first
where the DRDY pin is polled to determine when an update of
MICROCONTROLLER/MICROPROCESSOR SERIAL PORT
VALUES AND INITIATING A SELF CALIBRATION (68 HEX)
WRITE TO COMMUNICATIONS REGISTER SETTING UP
WRITE TO COMMUNICATIONS REGISTER SETTING UP
WRITE TO SETUP REGISTER SETTING UP REQUIRED
SAME GAIN AND SETTING UP NEXT OPERATION TO
GAIN AND SETTING UP NEXT OPERATION TO BE A
BE A READ FROM THE DATA REGISTER (38 HEX)
WRITE TO THE SETUP REGISTER (10 HEX)
POWER-ON/RESET FOR AD7715
READ FROM DATA REGISTER
CONFIGURE AND INITIALIZE
NO
POLL DRDY PIN
START
DRDY
LOW?
YES
Figure 10. Flow Chart for Setting Up and Reading from the AD7715
Rev. D | Page 31 of 40
GAIN AND SETTING UP NEXT OPERATION TO BE A READ FROM
WRITE TO COMMUNICATIONS REGISTER SETTING UP SAME
the data register has taken place, the second where the DRDY
bit of the communications register is interrogated to see if a
data register update has taken place. Also included in the
flowing diagram is a series of words which should be written
to the registers for a particular set of operating conditions.
These conditions are gain of 1, no filter sync, bipolar mode,
buffer off, clock of 2.4576 MHz, and an output rate of 60 Hz.
SAME GAIN AND SETTING UP NEXT OPERATION TO BE
WRITE TO COMMUNICATIONS REGISTER SETTING UP
POLL DRDY BIT OF COMMUNICATIONS REGISTER
A READ FROM THE DATA REGISTER (38 HEX)
THE COMMUNICATIONS REGISTER (08 HEX)
READ FROM COMMUNICATIONS REGISTER
READ FROM DATA REGISTER
NO
DRDY
LOW?
YES
AD7715